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74LS245 PDF预览

74LS245

更新时间: 2024-11-17 22:53:15
品牌 Logo 应用领域
美国国家半导体 - NSC 总线收发器
页数 文件大小 规格书
6页 142K
描述
TRI-STATE Octal Bus Transceiver

74LS245 数据手册

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June 1989  
54LS245/DM54LS245/DM74LS245  
TRI-STATE Octal Bus Transceiver  
É
General Description  
These octal bus transceivers are designed for asynchro-  
nous two-way communication between data buses. The  
control function implementation minimizes external timing  
requirements.  
Y
PNP inputs reduce DC loading on bus lines  
Y
Y
Y
Y
Hysteresis at bus inputs improve noise margins  
Typical propagation delay times, port-to-port 8 ns  
Typical enable/disable times 17 ns  
The device allows data transmission from the A bus to the B  
bus or from the B bus to the A bus depending upon the logic  
level at the direction control (DIR) input. The enable input  
(G) can be used to disable the device so that the buses are  
effectively isolated.  
I
(sink current)  
54LS  
74LS  
OL  
12 mA  
24 mA  
Y
Y
I
(source current)  
OH  
b
b
54LS  
74LS  
12 mA  
15 mA  
Features  
Y
Alternate Military/Aerospace device (54LS245) is avail-  
able. Contact a National Semiconductor Sales Office/  
Distributor for specifications.  
Bi-Directional bus transceiver in a high-density 20-pin  
package  
Y
TRI-STATE outputs drive bus lines directly  
Connection Diagram  
Dual-In-Line Package  
TL/F/6413–1  
Order Number 54LS245DMQB, 54LS245FMQB, 54LS245LMQB,  
DM54LS245J, DM54LS245W, DM74LS245WM or DM74LS245N  
See NS Package Number E20A, J20A, M20B, N20A or W20A  
Function Table  
Direction  
Enable  
G
Operation  
Control  
DIR  
L
L
L
H
X
B data to A bus  
A data to B bus  
Isolation  
H
e
e
e
Low Level, X Irrelevant  
H
High Level, L  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/6413  
RRD-B30M105/Printed in U. S. A.  

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