74LS09

更新时间： 2024-11-11 22:53:15

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		栅
页数	文件大小	规格书
4页	51K
描述
Quad 2-Input AND Gates with Open-Collector Outputs

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

74LS09 数据手册

August 1986

Revised March 2000

DM74LS09

Quad 2-Input AND Gates with Open-Collector Outputs

General Description

Pull-Up Resistor Equations

This device contains four independent gates each of which

performs the logic AND function. The open-collector out-

puts require external pull-up resistors for proper logical

operation.

Where:

N₁(I_OH) = total maximum output high current

for all outputs tied to pull-up resistor

N₂(I_IH) = total maximum input high current for

all inputs tied to pull-up resistor

N₃(I_IL) = total maximum input low current for

all inputs tied to pull-up resistor

Ordering Code:

Order Number Package Number

Package Description

DM74LS09M

DM74LS09N

M14A

N14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also available in Tape and Reel.

Connection Diagram

Function Table

Y = AB

Inputs

Output

H = HIGH Logic Level

L = LOW Logic Level

DS006348

www.fairchildsemi.com

12 3 4

中文翻译

下载PDF

与74LS09相关器件

型号	品牌	获取价格	描述	数据表
74LS09A	NXP	获取价格	AND Gate, LS Series, 4-Func, 2-Input, TTL, PDIP14
74LS09DC	ETC	获取价格	Quad 2-input AND Gate
74LS09DCQM	FAIRCHILD	获取价格	暂无描述
74LS09DCQM	ROCHESTER	获取价格	AND Gate
74LS09DCQR	ROCHESTER	获取价格	AND Gate
74LS09DCQR	FAIRCHILD	获取价格	AND Gate, TTL, CDIP14,
74LS09F	NXP	获取价格	AND Gate, LS Series, 4-Func, 2-Input, TTL, CDIP14
74LS09N	NXP	获取价格	IC LS SERIES, QUAD 2-INPUT AND GATE, PDIP14, PLASTIC, DIP-14, Gate
74LS09PC	ETC	获取价格	Quad 2-input AND Gate
74LS09PCQM	FAIRCHILD	获取价格	AND Gate, TTL, PDIP14,