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74LCXZ16244MTD PDF预览

74LCXZ16244MTD

更新时间: 2024-01-27 16:01:55
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器
页数 文件大小 规格书
8页 94K
描述
Low Voltage 16-Bit Buffer/Line Driver with 5V Tolerant Inputs and Outputs

74LCXZ16244MTD 数据手册

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September 2000  
Revised September 2000  
74LCXZ16244  
Low Voltage 16-Bit Buffer/Line Driver  
with 5V Tolerant Inputs and Outputs  
General Description  
Features  
5V tolerant inputs and outputs  
The LCXZ16244 contains sixteen non-inverting buffers  
with 3-STATE outputs designed to be employed as a mem-  
ory and address driver, clock driver, or bus oriented trans-  
mitter/receiver. The device is nibble controlled. Each nibble  
has separate 3-STATE control inputs which can be shorted  
together for full 16-bit operation.  
Guaranteed power up/down high impedance  
Supports live insertion/withdrawal  
2.7V–3.6V VCC specifications provided  
4.5 ns tPD max (VCC = 3.0V), 20 µA ICC max  
±24 mA output drive (VCC = 3.0V)  
When VCC is between 0 and 1.5V, the LCXZ12644 is in the  
high impedance state during power up or power down. This  
places the outputs in high impedance (Z) state preventing  
intermittent low impedance loading or glitching in bus ori-  
ented applications.  
Implements patented noise/EMI reduction circuitry  
Latch-up performance exceeds 500 mA  
ESD performance:  
Human body model > 2000V  
The LCXZ16244 is designed for low voltage (2.7V or 3.3V)  
VCC applications with capability of interfacing to a 5V signal  
Machine model > 200V  
environment.  
The LCXZ16244 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing CMOS low power dissipation.  
Ordering Code:  
Order Number  
74LCXZ16244MEA  
74LCXZ16244MTD  
Package Number  
MS48A  
Package Description  
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300 Wide  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
MTD48  
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
Connection Diagram  
Logic Symbol  
Pin Descriptions  
Pin Names  
Description  
OEn  
Output Enable Input (Active LOW)  
I0I15  
O0O15  
Inputs  
Outputs  
© 2000 Fairchild Semiconductor Corporation  
DS500252  
www.fairchildsemi.com  

74LCXZ16244MTD 替代型号

型号 品牌 替代类型 描述 数据表
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