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74LCXH162373 PDF预览

74LCXH162373

更新时间: 2023-12-18 00:00:00
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 锁存器
页数 文件大小 规格书
11页 115K
描述
Low Voltage 16-Bit Transparent Latch with Bushold and 26з Series Resistor Outputs

74LCXH162373 数据手册

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February 2001  
Revised March 2002  
74LCXH162373  
Low Voltage 16-Bit Transparent Latch  
with Bushold and 26Series Resistor Outputs  
General Description  
Features  
5V tolerant control inputs and outputs  
The LCXH162373 contains sixteen non-inverting latches  
with 3-STATE outputs and is intended for bus oriented  
applications. The device is byte controlled. The flip-flops  
appear transparent to the data when the Latch Enable (LE)  
is HIGH. When LE is LOW, the data that meets the setup  
time is latched. Data appears on the bus when the Output  
Enable (OE) is LOW. When OE is HIGH, the outputs are in  
a high impedance state.  
2.3V–3.6V VCC specifications provided  
Equivalent 26series resistors on outputs  
Bushold on inputs eliminates the need for external  
pull-up/pull-down resistors  
6.2 ns tPD max (VCC = 3.3V), 20 µA ICC max  
Power down high impedance inputs and outputs  
±12 mA output drive (VCC = 3.0V)  
The LCXH162373 is designed for low voltage (2.5V or  
3.3V) VCC applications with capability of interfacing to a 5V  
Implements patented noise/EMI reduction circuitry  
Latch-up performance exceeds 500 mA  
ESD performance:  
signal environment. The 26series resistor helps reduce  
output overshoot and undershoot.  
The LCXH162373 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing CMOS low power dissipation.  
Human body model > 2000V  
Machine model > 200V  
The LCXH162373 data inputs include active bushold cir-  
cuitry, eliminating the need for external pull-up resistors to  
hold unused or floating data inputs at a valid logic level.  
Also packaged in plastic Fine-Pitch Ball Grid Array  
(FBGA) (Preliminary)  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74LCXH162373GX  
(Note 1)  
BGA54A  
(Preliminary)  
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide  
[TAPE and REEL]  
74LCXH162373MEA  
74LCXH162373MEX  
74LCXH162373MTD  
74LCXH162373MTX  
MS48A  
MS48A  
MTD48  
MTD48  
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide  
[RAIL]  
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide  
[TAPE and REEL]  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
[RAIL]  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
[TAPE and REEL]  
Note 1: BGA package available in Tape and Reel only.  
Logic Symbol  
© 2002 Fairchild Semiconductor Corporation  
DS500445  
www.fairchildsemi.com  

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