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74LCX541TTR PDF预览

74LCX541TTR

更新时间: 2024-11-20 22:10:27
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 输出元件输入元件
页数 文件大小 规格书
9页 227K
描述
LOW VOLTAGE CMOS OCTAL BUS BUFFER (3-STATE) WITH 5V TOLERANT INPUTS AND OUTPUTS

74LCX541TTR 数据手册

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74LCX541  
LOW VOLTAGE CMOS OCTAL BUS BUFFER (3-STATE)  
WITH 5V TOLERANT INPUTS AND OUTPUTS  
5V TOLERANT INPUTS AND OUTPUTS  
HIGH SPEED :  
t
= 8.0 ns (MAX.) at V = 3V  
PD  
CC  
POWER DOWN PROTECTION ON INPUTS  
AND OUTPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
SOP  
TSSOP  
|I | = I = 24mA (MIN) at V = 3V  
OH  
OL  
CC  
PCI BUS LEVELS GUARANTEED AT 24 mA  
BALANCED PROPAGATION DELAYS:  
t
t
PHL  
ORDER CODES  
PACKAGE  
PLH  
OPERATING VOLTAGE RANGE:  
(OPR) = 2.0V to 3.6V (1.5V Data  
TUBE  
T & R  
V
CC  
SOP  
74LCX541M  
74LCX541MTR  
74LCX541TTR  
Retention)  
TSSOP  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 541  
LATCH-UP PERFORMANCE EXCEEDS  
500mA (JESD 17)  
ESD PERFORMANCE:  
HBM > 2000V (MIL STD 883 method 3015);  
MM > 200V  
The 3 STATE control gate operates as two input  
AND such that if either G1 and G2 are high, all  
eight outputs are in the high impedance state. In  
order to enhance PC board layout the 74LCX541  
offers a pinout having inputs and outputs on  
opposite sides of the package.  
It has same speed performance at 3.3V than 5V  
AC/ACT family, combined with a lower power  
consumption.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
DESCRIPTION  
The 74LCX541 is a low voltage CMOS OCTAL  
BUS BUFFER (NON-INVERTED) fabricated with  
sub-micron silicon gate and double-layer metal  
2
wiring C MOS technology. It is ideal for low power  
and high speed 3.3V applications; it can be  
interfaced to 5V signal environment for both inputs  
and outputs.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
September 2001  
1/9  

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