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74LCX541_07 PDF预览

74LCX541_07

更新时间: 2024-11-18 04:47:47
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意法半导体 - STMICROELECTRONICS 输出元件输入元件
页数 文件大小 规格书
17页 296K
描述
LOW VOLTAGE CMOS OCTAL BUS BUFFER (3-STATE) WITH 5V TOLERANT INPUTS AND OUTPUTS

74LCX541_07 数据手册

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74LCX541  
Low voltage CMOS octal bus buffer (3-state)  
with 5V tolerant inputs and outputs  
Features  
5V tolerant inputs and outputs  
High speed:  
– t = 8.0ns (Max) at V = 3V  
PD  
CC  
Power down protection on inputs and outputs  
Symmetrical output impedance:  
SO-20  
TSSOP20  
– |I | = I = 24mA (Min) at V = 3V  
OH  
OL  
CC  
PCI bus levels guaranteed at 24mA  
Balanced propagation delays:  
Description  
– t  
t  
PHL  
PLH  
The 74LCX541 is a low voltage CMOS octal bus  
buffer (non-inverted) fabricated with sub-micron  
silicon gate and double-layer metal wiring C MOS  
technology. It is ideal for low power and high  
speed 3.3V applications; it can be interfaced to  
5V signal environment for both inputs and  
outputs.  
Operating voltage range:  
– V (Opr) = 2.0V to 3.6V  
2
CC  
Pin and function compatible with  
74 series 541  
Latch-up performance exceeds  
500mA (JESD 17)  
The 3 STATE control gate operates as two input  
AND such that if either G1 and G2 are high, all  
eight outputs are in the high impedance state. In  
order to enhance PC board layout the 74LCX541  
offers a pinout having inputs and outputs on  
opposite sides of the package.  
ESD performance:  
– HBM > 2000V  
(MIL STD 883 method 3015); MM > 200V  
It has same speed performance at 3.3V than 5V  
AC/ACT family, combined with a lower power  
consumption.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
Order codes  
Part number  
Package  
SO-20  
Packaging  
74LCX541MTR  
Tape and reel  
Tape and reel  
74LCX541TTR  
TSSOP20  
January 2007  
Rev 5  
1/17  
www.st.com  
17  

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