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74LCX540WM PDF预览

74LCX540WM

更新时间: 2024-11-17 22:36:35
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
12页 550K
描述
Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs

74LCX540WM 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:SOIC
包装说明:0.300 INCH, LEAD FREE, MS-013AC, SOIC-20针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.06
其他特性:WITH DUAL OUTPUT ENABLE控制类型:ENABLE LOW
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:12.8 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A湿度敏感等级:1
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:RAIL
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:6.5 ns传播延迟(tpd):7.8 ns
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.5 mmBase Number Matches:1

74LCX540WM 数据手册

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March 1995  
Revised March 2005  
74LCX540  
Low Voltage Octal Buffer/Line Driver  
with 5V Tolerant Inputs and Outputs  
General Description  
The LCX540 is an octal buffer/line driver designed to be  
employed as a memory and address driver, clock driver  
and bus oriented transmitter/receiver.  
Features  
5V tolerant inputs and outputs  
2.3V–3.6V VCC specifications provided  
6.5 ns tPD max (VCC 3.3V), 10 A ICC max  
This device is similar in function to the LCX240 while pro-  
viding flow-through architecture (inputs on opposite side  
from outputs). This pinout arrangement makes this device  
especially useful as an output port for microprocessors,  
allowing ease of layout and greater PC board density.  
Power down high impedance inputs and outputs  
Supports live insertion/withdrawal (Note 1)  
Implements patented noise/EMI reduction circuitry  
Latch-up performance exceeds JEDEC 78 conditions  
ESD performance:  
The LCX540 is designed for low voltage (2.5V or 3.3V) VCC  
applications with capability of interfacing to a 5V signal  
environment. The LCX540 is fabricated with an advanced  
CMOS technology to achieve high speed operation while  
maintaining CMOS low power dissipation.  
Human body model 2000V  
Machine model 200V  
Leadless Pb-Free DQFN package  
Note 1: To ensure the high-impedance state during power up or down, OE  
should be tied to V  
through a pull-up resistor: the minimum value or the  
CC  
resistor is determined by the current-sourcing capability of the driver.  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74LCX540WM  
74LCX540SJ  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74LCX540BQX  
(Preliminary)  
(Note 2)  
MLP020B Pb-Free 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC  
MO-241, 2.5 x 4.5mm  
74LCX540MSA  
74LCX540MTC  
MSA20  
MTC20  
MTC20  
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74LCX540MTC_NL  
(Note 3)  
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Note 2: DQFN package available in Tape and Reel only.  
Note 3: _NLindicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.  
© 2005 Fairchild Semiconductor Corporation  
DS012403  
www.fairchildsemi.com  

74LCX540WM 替代型号

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SN74LVC540APW TI

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