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74LCX38 PDF预览

74LCX38

更新时间: 2024-09-30 22:56:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD
页数 文件大小 规格书
7页 85K
描述
Low Voltage Quad 2-Input NAND Gate (Open Drain) with 5V Tolerant Inputs

74LCX38 数据手册

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October 1995  
Revised June 1999  
74LCX38  
Low Voltage Quad 2-Input NAND Gate (Open Drain)  
with 5V Tolerant Inputs  
General Description  
The LCX38 contains four 2-input open drain NAND gates.  
The inputs tolerate voltages up to 7V allowing the interface  
of 5V systems to 3V systems.  
Features  
5V tolerant inputs  
2.3V–3.6V VCC specifications provided  
6.5 ns tPD max (VCC = 3.3V), 10 µA ICC max  
The 74LCX38 is fabricated with advanced CMOS technol-  
ogy to achieve high speed operation while maintaining  
CMOS low power dissipation.  
Power down high impedance inputs and outputs  
±24 mA output drive (VCC = 3.0V)  
Implements patented noise/EMI reduction circuitry  
Latch-up performance exceeds 500 mA  
ESD performance:  
Human body model > 2000V  
Machine model > 150V  
Ordering Code:  
Order Number Package Number  
Package Description  
74LCX38M  
M14A  
M14D  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74LCX38SJ  
74LCX38MTC  
MTC14  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
An, Bn  
On  
Description  
Inputs  
Outputs  
© 1999 Fairchild Semiconductor Corporation  
DS012574  
www.fairchildsemi.com  

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74LCX38MX_NL FAIRCHILD

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NAND Gate, LVC/LCX/Z Series, 4-Func, 2-Input, CMOS, PDSO14, 0.150 INCH, LEAD FREE, MS-012,