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74LCX374SJX PDF预览

74LCX374SJX

更新时间: 2024-02-03 09:08:01
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
12页 556K
描述
Low Voltage Octal D-Type Flip-Flop with 5V Tolerant Inputs and Outputs

74LCX374SJX 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:SOIC
包装说明:SOP, SOP20,.4针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.04
Is Samacsys:N系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G20JESD-609代码:e3
长度:12.8 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大频率@ Nom-Sup:150000000 Hz
最大I(ol):0.024 A湿度敏感等级:1
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:8.5 ns传播延迟(tpd):10.5 ns
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:FF/Latches最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.5 mm
Base Number Matches:1

74LCX374SJX 数据手册

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February 1994  
Revised March 2005  
74LCX374  
Low Voltage Octal D-Type Flip-Flop  
with 5V Tolerant Inputs and Outputs  
General Description  
Features  
5V tolerant inputs and outputs  
The LCX374 consists of eight D-type flip-flops featuring  
separate D-type inputs for each flip-flop and 3-STATE out-  
puts for bus-oriented applications. A buffered clock (CP)  
and Output Enable (OE) are common to all flip-flops. The  
LCX374 is designed for low voltage (3.3V or 2.5V) VCC  
2.3V–3.6V VCC specifications provided  
8.5 ns tPD max (VCC 3.3V), 10 A ICC max  
Power-down high impedance inputs and outputs  
Supports live insertion/withdrawal (Note 1)  
applications with capability of interfacing to a 5V signal  
environment.  
24 mA output drive (VCC 3.0V)  
The LCX374 is fabricated with an advanced CMOS tech-  
nology to achieve high speed operation while maintaining  
CMOS low power dissipation.  
Implements patented noise/EMI reduction circuitry  
Latch-up performance exceeds JEDEC 78 conditions  
ESD performance:  
Human Body Model 2000V  
Machine Model 200V  
Leadless Pb-Free DQFN package  
Note 1: To ensure the high-impedance state during power up or down, OE  
should be tied to V  
through a pull-up resistor: the minimum value or the  
CC  
resistor is determined by the current-sourcing capability of the driver.  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74LCX374WM  
74LCX374SJ  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74LCX374BQX  
(Preliminary)  
(Note 2)  
MLP020B Pb-Free 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC  
MO-241, 2.5 x 4.5mm  
74LCX374MSA  
74LCX374MTC  
MSA20  
MTC20  
MTC20  
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74LCX374MTCX_NL  
(Note 3)  
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
Devices also available in Tape and Reel. Specify by appending suffix letter Xto the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Note 2: DQFN package available in Tape and Reel only.  
Note 3: _NLindicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.  
© 2005 Fairchild Semiconductor Corporation  
DS011996  
www.fairchildsemi.com  

74LCX374SJX 替代型号

型号 品牌 替代类型 描述 数据表
74LCX374SJ FAIRCHILD

完全替代

Low Voltage Octal D-Type Flip-Flop with 5V Tolerant Inputs and Outputs

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