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74LCX373MSAX PDF预览

74LCX373MSAX

更新时间: 2024-11-20 22:56:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
14页 325K
描述
Low Voltage Octal Transparent Latch with 5V Tolerant Inputs and Outputs

74LCX373MSAX 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP, SSOP20,.3针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.07
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:7.2 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
湿度敏感等级:1位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP20,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:8 ns
传播延迟(tpd):10.5 ns认证状态:Not Qualified
座面最大高度:2.05 mm子类别:FF/Latches
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.3 mm
Base Number Matches:1

74LCX373MSAX 数据手册

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February 1994  
Revised October 2005  
74LCX373  
Low Voltage Octal Transparent Latch  
with 5V Tolerant Inputs and Outputs  
General Description  
Features  
The LCX373 consists of eight latches with 3-STATE outputs for  
bus organized system applications. The device is designed for  
5V tolerant inputs and outputs  
2.3V–3.6V V specifications provided  
CC  
low voltage (3.3V or 2.5V) V  
applications with capability of  
CC  
interfacing to a 5V signal environment.  
8.0 ns t max (V  
3.3V), 10 A I max  
CC  
PD  
CC  
The LCX373 is fabricated with an advanced CMOS technology  
to achieve high speed operation while maintaining CMOS low  
power dissipation.  
Power-down high impedance inputs and outputs  
Supports live insertion/withdrawal (Note )  
24 mA output drive (V  
3.0V)  
CC  
Implements patented noise/EMI reduction circuitry  
Latch-up performance exceeds JEDEC 78 conditions  
ESD performance:  
Human Body Model 2000V  
Machine Model 200V  
Leadless Pb-Free DQFN package  
Note 1: To ensure the high-impedance state during power up or down, OE should be  
tied to V through a pull-up resistor: the minimum value or the resistor is determined  
CC  
by the current-sourcing capability of the driver.  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74LCX373WM  
74LCX373SJ  
M20B  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M20D  
74LCX373BQX  
(Preliminary)  
(Note 2)  
MLP020B  
Pb-Free 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC  
MO-241, 2.5 x 4.5mm  
74LCX373MSA  
74LCX373MTC  
MSA20  
MTC20  
MTC20  
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74LCX373MTCX_NL  
(Note 3)  
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Note 2: DQFN package available in Tape and Reel only.  
Note 3: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.  
© 2005 Fairchild Semiconductor Corporation  
DS011995  
www.fairchildsemi.com  

74LCX373MSAX 替代型号

型号 品牌 替代类型 描述 数据表
74LCX373MSA FAIRCHILD

完全替代

Low Voltage Octal Transparent Latch with 5V Tolerant Inputs and Outputs
74LVC373ADB NXP

类似代替

Octal D-type transparent latch with 5-volt tolerant inputs/outputs 3-State
74LVC373ADB,118 NXP

功能相似

74LVC373A - Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-State SSOP2

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74LCX373MSAX_NL FAIRCHILD

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Low Voltage Octal Transparent Latch with 5V Tolerant Inputs and Outputs
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OCTAL D-TYPE LATCH NON-INVERTING (3-STATE) WITH 5V TOLERANT INPUTS AND OUTPUTS
74LCX373SJ FAIRCHILD

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Low Voltage Octal Transparent Latch with 5V Tolerant Inputs and Outputs