5秒后页面跳转
74LCX373 PDF预览

74LCX373

更新时间: 2024-11-17 22:12:47
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 锁存器输出元件输入元件
页数 文件大小 规格书
10页 219K
描述
OCTAL D-TYPE LATCH NON-INVERTING (3-STATE) WITH 5V TOLERANT INPUTS AND OUTPUTS

74LCX373 数据手册

 浏览型号74LCX373的Datasheet PDF文件第2页浏览型号74LCX373的Datasheet PDF文件第3页浏览型号74LCX373的Datasheet PDF文件第4页浏览型号74LCX373的Datasheet PDF文件第5页浏览型号74LCX373的Datasheet PDF文件第6页浏览型号74LCX373的Datasheet PDF文件第7页 
74LCX373  
OCTAL D-TYPE LATCH NON-INVERTING (3-STATE)  
WITH 5V TOLERANT INPUTS AND OUTPUTS  
5V TOLERANT INPUTS AND OUTPUTS  
HIGH SPEED :  
= 8.0 ns (MAX.) at V = 3V  
t
PD  
CC  
POWER DOWN PROTECTION ON INPUTS  
AND OUTPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
SOP  
TSSOP  
|I | = I = 24mA (MIN) at V = 3V  
OH  
OL  
CC  
PCI BUS LEVELS GUARANTEED AT 24 mA  
BALANCED PROPAGATION DELAYS:  
ORDER CODES  
PACKAGE  
t
t
PLH  
PHL  
TUBE  
T & R  
OPERATING VOLTAGE RANGE:  
(OPR) = 2.0V to 3.6V (1.5V Data  
V
SOP  
74LCX373M  
74LCX373MTR  
74LCX373TTR  
CC  
Retention)  
TSSOP  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 373  
LATCH-UP PERFORMANCE EXCEEDS  
500mA (JESD 17)  
ESD PERFORMANCE:  
HBM > 2000V (MIL STD 883 method 3015);  
MM > 200V  
enable input (LE) and an output enable input (OE).  
While the LE inputs is held at a high level, the Q  
outputs will follow the data input. When the LE is  
taken low, the Q outputs will be latched precisely  
at the logic level of D input data. While the (OE)  
input is low, the 8 outputs will be in a normal logic  
state (high or low logic level) and while (OE) is in  
high level, the outputs will be in a high impedance  
state.  
DESCRIPTION  
The 74LCX373 is a low voltage CMOS OCTAL  
D-TYPE LATCH with  
NON-INVERTING fabricated with sub-micron  
silicon gate and double-layer metal wiring C MOS  
3
STATE OUTPUT  
It has same speed performance at 3.3V than 5V  
AC/ACT family, combined with a lower power  
consumption.  
2
technology. It is ideal for low power and high  
speed 3.3V applications; it can be interfaced to 5V  
signal environment for both inputs and outputs.  
These 8 bit D-Type latch are controlled by a latch  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
September 2001  
1/10  

与74LCX373相关器件

型号 品牌 获取价格 描述 数据表
74LCX373_04 STMICROELECTRONICS

获取价格

OCTAL D-TYPE LATCH NON-INVERTING (3-STATE) WITH 5V TOLERANT INPUTS AND OUTPUTS
74LCX373_08 FAIRCHILD

获取价格

Low Voltage Octal Transparent Latch with 5V Tolerant Inputs and Outputs
74LCX373BQX FAIRCHILD

获取价格

Low Voltage Octal Transparent Latch with 5V Tolerant Inputs and Outputs
74LCX373DTR2G ONSEMI

获取价格

LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
74LCX373FT TOSHIBA

获取价格

Octal D-Type Latch, TSSOP20B
74LCX373M STMICROELECTRONICS

获取价格

OCTAL D-TYPE LATCH NON-INVERTING (3-STATE) WITH 5V TOLERANT INPUTS AND OUTPUTS
74LCX373MSA FAIRCHILD

获取价格

Low Voltage Octal Transparent Latch with 5V Tolerant Inputs and Outputs
74LCX373MSAX FAIRCHILD

获取价格

Low Voltage Octal Transparent Latch with 5V Tolerant Inputs and Outputs
74LCX373MSAX_NL FAIRCHILD

获取价格

Bus Driver, LVC/LCX/Z Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, 5.30 MM, LEAD FREE
74LCX373MTC FAIRCHILD

获取价格

Low Voltage Octal Transparent Latch with 5V Tolerant Inputs and Outputs