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74LCX32244G PDF预览

74LCX32244G

更新时间: 2024-11-10 22:36:07
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器逻辑集成电路
页数 文件大小 规格书
7页 110K
描述
Low Voltage 32-Bit Buffer/Line Driver with 5V Tolerant Inputs and Outputs

74LCX32244G 技术参数

是否无铅: 不含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:BGA
包装说明:LFBGA, BGA96,6X16,32针数:96
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.43Is Samacsys:N
控制类型:ENABLE LOW系列:LVC/LCX/Z
JESD-30 代码:R-PBGA-B96JESD-609代码:e0
长度:13.5 mm逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A湿度敏感等级:3
位数:16功能数量:2
端口数量:2端子数量:96
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE WITH SERIES RESISTOR输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:LFBGA
封装等效代码:BGA96,6X16,32封装形状:RECTANGULAR
封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH包装方法:TRAY
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:4.5 ns传播延迟(tpd):5.4 ns
认证状态:Not Qualified座面最大高度:1.4 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5.5 mmBase Number Matches:1

74LCX32244G 数据手册

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April 2001  
Revised June 2002  
74LCX32244  
Low Voltage 32-Bit Buffer/Line Driver  
with 5V Tolerant Inputs and Outputs  
General Description  
Features  
5V tolerant inputs and outputs  
The LCX32244 contains thirty-two non-inverting buffers  
with 3-STATE outputs designed to be employed as a mem-  
ory and address driver, clock driver, or bus oriented trans-  
mitter/receiver. The device is nibble controlled. Each nibble  
has separate 3-STATE control inputs which can be shorted  
together for full 32-bit operation.  
2.3V–3.6V VCC specifications provided  
4.5 ns tPD max (VCC = 3.0V), 20 µA ICC max  
Power down high impedance inputs and outputs  
Supports live insertion/withdrawal (Note 1)  
±24 mA output drive (VCC = 3.0V)  
The LCX32244 is designed for low voltage (2.5V or 3.3V)  
VCC applications with capability of interfacing to a 5V signal  
Uses patented noise/EMI reduction circuitry  
Latch-up performance exceeds 500 mA  
ESD performance:  
environment.  
The LCX32244 is fabricated with an advanced CMOS tech-  
nology to achieve high speed operation while maintaining  
CMOS low power dissipation.  
Human body model > 2000V  
Machine model > 200V  
Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)  
Note 1: To ensure the high-impedance state during power up or down OE  
should be tied to VCC through a pull-up resistor: the minimum value or the  
resistor is determined by the current-sourcing capability of the driver.  
Ordering Code:  
Order Number Package Number  
Package Description  
74LCX32244G  
(Note 2)(Note 3)  
BGA96A  
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide  
Note 2: Ordering code Gindicates Trays.  
Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
Logic Symbol  
© 2002 Fairchild Semiconductor Corporation  
DS500426  
www.fairchildsemi.com  

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