74LCX273SJ

更新时间： 2024-11-17 21:53:55

品牌	Logo	应用领域
美国国家半导体 - NSC		触发器
页数	文件大小	规格书
2页	66K
描述
Low-Voltage Octal D Flip-Flop with 5V Tolerant Inputs and Outputs

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74LCX273SJ 数据手册

ADVANCE INFORMATION

November 1996

74LCX273

Low-Voltage Octal D Flip-Flop

with 5V Tolerant Inputs and Outputs

General Description

Features

5V tolerant inputs and outputs

The LCX273 has eight edge-triggered D-type flip-flops with

individual D inputs and Q outputs. The common buffered

Clock (CP) and Master Reset (MR) input load and reset

(clear) all flip-flops simultaneously.

10 mA I

max

CCQ

Power-down high impedance inputs and outputs

Supports live insertion/withdrawal

The register is fully edge-triggered. The state of each D in-

put, one setup time before the LOW-to-HIGH clock tran-

sition, is transferred to the corresponding flip-flop’s Q out-

put.

2.0V–3.6V V supply operation

24 mA output drive

Implements patented Quiet Series^TMnoise/EMI

reduction circuitry

All outputs will be forced LOW independently of Clock or

Data inputs by a LOW voltage level on the MR input. The

device is useful for applications where the true output only is

required and the Clock and Master Reset are common to all

storage elements.

Functionally compatible with the 74 series 273

Latch-up performance exceeds 500 mA

ESD performance:

200V

Human Body Model

2000V

Machine Model

The device is designed for low voltage (3.3V) V

applica-

tions with capability of interfacing to a 5V signal environ-

ment. The LCX273 is fabricated with an advanced CMOS

technology to achieve high speed operation while maintain-

ing CMOS low power dissipation.

Logic Symbols

Connection Diagram

Pin Assignment for

SOIC, SSOP and TSSOP

IEEE/IEC

TL/F/12640–1

TL/F/12640–3

TL/F/12640–2

Pin Names

Description

D –D

Data Inputs

Master Reset

Clock Pulse Input

Data Outputs

Q –Q

SOIC JEDEC

SOIC EIAJ

SSOP Type II

TSSOP JEDEC

Order Number

74LCX273WM

74LCX273WMX

74LCX273SJ

74LCX273MSA

74LCX273MSAX

74LCX273MTC

74LCX273MTCX

74LCX273SJX

See NS Package Number

M20B

M20D

MSA20

MTC20

TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.

Quiet Series^TMis a trademark of National Semiconductor Corporation.

1996 National Semiconductor Corporation

TL/F/12640

RRD-B30M17/Printed in U. S. A.

http://www.national.com

中文翻译

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与74LCX273SJ相关器件

型号	品牌	获取价格	描述	数据表
74LCX273SJX	NSC	获取价格	Low-Voltage Octal D Flip-Flop with 5V Tolerant Inputs and Outputs
74LCX273WM	NSC	获取价格	Low-Voltage Octal D Flip-Flop with 5V Tolerant Inputs and Outputs
74LCX273WMX	NSC	获取价格	Low-Voltage Octal D Flip-Flop with 5V Tolerant Inputs and Outputs
74LCX27M	FAIRCHILD	获取价格	Low Voltage Triple 3-Input NOR Gate with 5V Tolerant Inputs
74LCX27MTC	FAIRCHILD	获取价格	Low Voltage Triple 3-Input NOR Gate with 5V Tolerant Inputs
74LCX27MTCX	FAIRCHILD	获取价格	Triple 3-input NOR Gate
74LCX27MTCX_NL	FAIRCHILD	获取价格	Low Voltage Triple 3-Input NOR Gate with 5V Tolerant Inputs
74LCX27MX	FAIRCHILD	获取价格	Triple 3-input NOR Gate
74LCX27SJ	FAIRCHILD	获取价格	Low Voltage Triple 3-Input NOR Gate with 5V Tolerant Inputs
74LCX27SJX	FAIRCHILD	获取价格	Triple 3-input NOR Gate

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