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74LCX257MX_NL PDF预览

74LCX257MX_NL

更新时间: 2024-11-26 20:09:11
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 光电二极管逻辑集成电路
页数 文件大小 规格书
9页 98K
描述
Multiplexer, LVC/LCX/Z Series, 4-Func, 2 Line Input, 1 Line Output, True Output, CMOS, PDSO16, 0.150 INCH, MS-012, SOIC-16

74LCX257MX_NL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP16,.25
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.1
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:9.9 mm
负载电容(CL):50 pF逻辑集成电路类型:MULTIPLEXER
最大I(ol):0.024 A湿度敏感等级:1
功能数量:4输入次数:2
输出次数:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:6 ns传播延迟(tpd):7.2 ns
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Multiplexer/Demultiplexers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmBase Number Matches:1

74LCX257MX_NL 数据手册

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May 1995  
Revised September 2000  
74LCX257  
Low Voltage Quad 2-Input Multiplexer  
with 5V Tolerant Inputs and Outputs  
General Description  
Features  
5V tolerant inputs and outputs  
The LCX257 is a quad 2-input multiplexer with 3-STATE  
outputs. Four bits of data from two sources can be selected  
using a Common Data Select input. The four outputs  
present the selected data in true (non inverted) form. The  
outputs may be switched to a high impedance state by  
placing a logic HIGH on the common Output Enable (OE)  
input, allowing the outputs to interface directly with bus-ori-  
ented systems.  
2.3V–3.6V VCC specifications provided  
6.0 ns tPD max (VCC = 3.3V, In Zn), 10 µA ICC max  
Power down high impedance inputs and outputs  
Supports live insertion/withdrawal (Note 1)  
Implements patented noise/EMI reduction circuitry  
Latch-up performance exceeds 500 mA  
ESD performance:  
The 74LCX257 is fabricated with advanced CMOS technol-  
ogy to achieve high speed operation while maintaining  
CMOS low power dissipation.  
Human body model > 2000V  
Machine model > 200V  
Note 1: To ensure the high-impedance state during power up or down, OE  
should be tied to VCC through a pull-up resistor: the minimum value or the  
resistor is determined by the current-sourcing capability of the driver.  
Ordering Code:  
Order Number Package Number  
Package Description  
74LCX257M  
M16A  
M16D  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74LCX257SJ  
74LCX257MTC  
MTC16  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
Description  
S
Common Data Select Input  
3-STATE Output Enable Input  
Data Inputs from Source 0  
Data Inputs from Source 1  
3-STATE Multiplexer Outputs  
OE  
I0aI0d  
I1aI1d  
ZaZd  
© 2000 Fairchild Semiconductor Corporation  
DS012466  
www.fairchildsemi.com  

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