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74LCX241 PDF预览

74LCX241

更新时间: 2024-11-03 22:45:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器
页数 文件大小 规格书
10页 118K
描述
Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs

74LCX241 数据手册

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August 1998  
Revised March 2005  
74LCX241  
Low Voltage Octal Buffer/Line Driver with  
5V Tolerant Inputs and Outputs  
General Description  
Features  
5V tolerant inputs and outputs  
The LCX241 is an octal buffer and line driver designed to  
be employed as a memory address driver, clock driver and  
bus oriented transmitter or receiver. The device is designed  
for low voltage (2.5V or 3.3V) VCC applications with capa-  
2.3V – 3.6V VCC specifications provided  
6.5 ns tPD max (VCC 3.3V), 10 A ICC max  
Power-down high impedance inputs and outputs  
Supports live insertion/withdrawal (Note 1)  
Implements patented noise/EMI reduction circuitry  
Latch-up performance exceeds 500 mA  
ESD performance:  
bility of interfacing to a 5V signal environment.  
The LCX241 is fabricated with an advanced CMOS tech-  
nology to achieve high speed operation while maintaining  
CMOS low power dissipation.  
Human Body Model 2000V  
Machine Model 200V  
Note 1: To ensure the high-impedance state during power up or down, OE  
should be tied to V and OE should be tied to GND through a resistor: the  
CC  
minimum value or the resistor is determined by the current-sourcing capa-  
bility of the driver.  
Ordering Code:  
Order Number Package Number  
Package Description  
74LCX241WM  
74LCX241SJ  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74LCX241MSA  
74LCX241MTC  
MSA20  
MTC20  
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Connection Diagram  
Pin Descriptions  
Pin Names  
Description  
OE1, OE2  
I0I7  
3-STATE Output Enable Inputs  
Inputs  
O0O7  
Outputs  
© 2005 Fairchild Semiconductor Corporation  
DS012639  
www.fairchildsemi.com  

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