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74LCX240SJ_NL PDF预览

74LCX240SJ_NL

更新时间: 2024-11-04 13:04:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器
页数 文件大小 规格书
10页 118K
描述
Bus Driver, 2-Func, 4-Bit, Inverted Output, CMOS, PDSO20,

74LCX240SJ_NL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:SOP, SOP20,.3Reach Compliance Code:compliant
风险等级:5.79控制类型:ENABLE LOW
JESD-30 代码:R-PDSO-G20负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.024 A
位数:4功能数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
电源:3.3 VProp。Delay @ Nom-Sup:6.5 ns
认证状态:Not Qualified子类别:Bus Driver/Transceivers
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUALBase Number Matches:1

74LCX240SJ_NL 数据手册

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February 1994  
Revised March 2005  
74LCX240  
Low Voltage Octal Buffer/Line Driver with  
5V Tolerant Inputs and Outputs  
General Description  
Features  
5V tolerant inputs and outputs  
The LCX240 is an inverting octal buffer and line driver  
designed to be employed as a memory address driver,  
clock driver and bus oriented transmitter or receiver. The  
device is designed for low voltage (2.5V or 3.3V) VCC appli-  
2.3V–3.6V VCC specifications provided  
6.5 ns tPD max (VCC 3.3V), 10 A ICC max  
Power-down high impedance inputs and outputs  
Supports live insertion/withdrawal (Note 1)  
cations with capability of interfacing to a 5V signal environ-  
ment.  
The LCX240 is fabricated with an advanced CMOS tech-  
nology to achieve high speed operation while maintaining  
CMOS low power dissipation.  
24 mA output drive (VCC 3.0V)  
Implements patented noise/EMI reduction circuitry  
Latch-up performance exceeds 500 mA  
ESD performance:  
Human body model 2000V  
Machine model 200V  
Note 1: To ensure the high-impedance state during power up or down, OE  
should be tied to V  
through a pull-up resistor: the minimum value or the  
CC  
resistor is determined by the current-sourcing capability of the driver.  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74LCX240WM  
74LCX240SJ  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74LCX240MSA  
74LCX240MTC  
MSA20  
MTC20  
MTC20  
74LCX240MTCX_NL  
(Note 2)  
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Note 2: _NLindicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.  
Logic Diagram  
Connection Diagram  
© 2005 Fairchild Semiconductor Corporation  
DS011993  
www.fairchildsemi.com  

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