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74LCX240MSAX PDF预览

74LCX240MSAX

更新时间: 2024-11-04 00:01:23
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器逻辑集成电路光电二极管
页数 文件大小 规格书
10页 118K
描述
Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs

74LCX240MSAX 数据手册

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February 1994  
Revised March 2005  
74LCX240  
Low Voltage Octal Buffer/Line Driver with  
5V Tolerant Inputs and Outputs  
General Description  
Features  
5V tolerant inputs and outputs  
The LCX240 is an inverting octal buffer and line driver  
designed to be employed as a memory address driver,  
clock driver and bus oriented transmitter or receiver. The  
device is designed for low voltage (2.5V or 3.3V) VCC appli-  
2.3V–3.6V VCC specifications provided  
6.5 ns tPD max (VCC 3.3V), 10 A ICC max  
Power-down high impedance inputs and outputs  
Supports live insertion/withdrawal (Note 1)  
cations with capability of interfacing to a 5V signal environ-  
ment.  
The LCX240 is fabricated with an advanced CMOS tech-  
nology to achieve high speed operation while maintaining  
CMOS low power dissipation.  
24 mA output drive (VCC 3.0V)  
Implements patented noise/EMI reduction circuitry  
Latch-up performance exceeds 500 mA  
ESD performance:  
Human body model 2000V  
Machine model 200V  
Note 1: To ensure the high-impedance state during power up or down, OE  
should be tied to V  
through a pull-up resistor: the minimum value or the  
CC  
resistor is determined by the current-sourcing capability of the driver.  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74LCX240WM  
74LCX240SJ  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74LCX240MSA  
74LCX240MTC  
MSA20  
MTC20  
MTC20  
74LCX240MTCX_NL  
(Note 2)  
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Note 2: _NLindicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.  
Logic Diagram  
Connection Diagram  
© 2005 Fairchild Semiconductor Corporation  
DS011993  
www.fairchildsemi.com  

74LCX240MSAX 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC240ADBR TI

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