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74LCX16240MTD PDF预览

74LCX16240MTD

更新时间: 2024-11-19 22:45:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 73K
描述
Low Voltage 16-Bit Inverting Buffer/Line Driver with 5V Tolerant Inputs/Outputs

74LCX16240MTD 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Transferred零件包装代码:TSSOP
包装说明:TSSOP, TSSOP48,.3,20针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.15
Is Samacsys:N控制类型:ENABLE LOW
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G48
JESD-609代码:e4长度:12.5 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A湿度敏感等级:2
位数:4功能数量:4
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP48,.3,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:RAIL
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:4.5 ns传播延迟(tpd):5.4 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6.1 mmBase Number Matches:1

74LCX16240MTD 数据手册

 浏览型号74LCX16240MTD的Datasheet PDF文件第2页浏览型号74LCX16240MTD的Datasheet PDF文件第3页浏览型号74LCX16240MTD的Datasheet PDF文件第4页浏览型号74LCX16240MTD的Datasheet PDF文件第5页浏览型号74LCX16240MTD的Datasheet PDF文件第6页浏览型号74LCX16240MTD的Datasheet PDF文件第7页 
February 1994  
Revised April 1999  
74LCX16240  
Low Voltage 16-Bit Inverting Buffer/Line Driver with  
5V Tolerant Inputs/Outputs  
General Description  
Features  
5V tolerant inputs and outputs  
The LCX16240 contains sixteen inverting buffers with 3-  
STATE outputs designed to be employed as a memory and  
address driver, clock driver, or bus-oriented transmitter/  
receiver. The device is nibble controlled. Each nibble has  
separate 3-STATE control inputs which can be shorted  
together for full 16-bit operation.  
2.3V–3.6V VCC specifications provided  
4.5 ns tPD max (VCC = 3.3V), 20 µA ICC max  
Power down high impedance inputs and outputs  
Supports live insertion/withdrawal (Note 1)  
±24 mA output drive (VCC = 3.0V)  
The LCX16240 is designed for low voltage (2.5V or 3.3V)  
VCC applications with capacity of interfacing to a 5V signal  
Implements patented noise/EMI reduction circuitry  
Latch-up performance exceeds 500 mA  
ESD performance:  
environment.  
The LCX16240 is fabricated with an advanced CMOS tech-  
nology to achieve high speed operation while maintaining  
CMOS low power dissipation.  
Human body model > 2000V  
Machine model > 200V  
Note 1: To ensure the high-impedance state during power up or down, OE  
should be tied to V through a pull-up resistor: the minimum value or the  
CC  
resistor is determined by the current-sourcing capability of the driver.  
Ordering Code:  
Order Number Package Number  
Package Description  
74LCX16240MEA  
MS48A  
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
74LCX16240MTD  
MTD48  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Logic Symbol  
Pin Descriptions  
Pin Names  
Description  
OEn  
Output Enable Inputs (Active LOW)  
I0–I15  
O0–O15  
Inputs  
Outputs  
© 1999 Fairchild Semiconductor Corporation  
DS011999.prf  
www.fairchildsemi.com  

74LCX16240MTD 替代型号

型号 品牌 替代类型 描述 数据表
74LCX16240TTR STMICROELECTRONICS

完全替代

Low voltage CMOS 16-bit bus buffer (3-state) with 5V tolerant inputs and outputs
SN74LVCH16240ADGGR TI

功能相似

具有总线保持和三态输出的 16 通道、2V 至 3.6V 反相器 | DGG | 48 |

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