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74LCX162373 PDF预览

74LCX162373

更新时间: 2024-11-03 22:45:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 锁存器电阻器
页数 文件大小 规格书
10页 221K
描述
Low Voltage 16-Bit Transparent Latch with 5V Tolerant Inputs and Outputs and 26з Series Resistor

74LCX162373 数据手册

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February 2001  
Revised August 2001  
74LCX162373  
Low Voltage 16-Bit Transparent Latch  
with 5V Tolerant Inputs and Outputs  
and 26Series Resistor  
General Description  
Features  
I 5V tolerant inputs and outputs  
The LCX162373 contains sixteen non-inverting latches  
with 3-STATE outputs and is intended for bus oriented  
applications. The device is byte controlled. The flip-flops  
appear transparent to the data when the Latch Enable (LE)  
is HIGH. When LE is LOW, the data that meets the setup  
time is latched. Data appears on the bus when the Output  
Enable (OE) is LOW. When OE is HIGH, the outputs are in  
a high impedance state.  
I 2.3V–3.6V VCC specifications provided  
I Equivalent 26series resistor outputs  
I 6.2 ns tPD max (VCC = 3.3V), 20 µA ICC max  
I Power down high impedance inputs and outputs  
I Supports live insertion/withdrawal (Note 1)  
I
12 mA output drive (VCC = 3.0V)  
The LCX162373 is designed for low voltage (2.5V or 3.3V)  
I Implements patented noise/EMI reduction circuitry  
I Latch-up performance exceeds 500 mA  
I ESD performance:  
V
CC applications with capability of interfacing to a 5V signal  
environment. The 26series resistor in the output helps  
reduce output overshoot and undershoot.  
The LCX162373 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing CMOS low power dissipation.  
Human body model > 2000V  
Machine model > 200V  
I Also packaged in plastic Fine-Pitch Ball Grid Array  
(FBGA) (Preliminary)  
Note 1: To ensure the high-impedance state during power up or down, OE  
should be tied to VCC through a pull-up resistor: the minimum value or the  
resistor is determined by the current-sourcing capability of the driver.  
Ordering Code:  
Order Number Package Number  
Package Description  
74LCX162373GX  
(Note 2)  
BGA54A  
(Preliminary)  
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide  
[TAPE and REEL]  
74LCX162373MEA  
(Note 3)  
MS48A  
MTD48  
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide  
74LCX162373MTD  
(Note 3)  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Note 2: BGA package available in Tape and Reel only.  
Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
Logic Symbol  
© 2001 Fairchild Semiconductor Corporation  
DS500443  
www.fairchildsemi.com  

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