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74LCX125SJ PDF预览

74LCX125SJ

更新时间: 2024-11-26 21:55:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
11页 525K
描述
Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

74LCX125SJ 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOP
包装说明:SOP, SOP14,.3针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.48
控制类型:ENABLE LOW系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G14JESD-609代码:e3
长度:10.2 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.024 A
湿度敏感等级:1位数:1
功能数量:4端口数量:2
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:RAIL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:6 ns
传播延迟(tpd):7.2 ns认证状态:Not Qualified
座面最大高度:2.1 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:5.3 mm
Base Number Matches:1

74LCX125SJ 数据手册

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March 1995  
Revised February 2005  
74LCX125  
Low Voltage Quad Buffer  
with 5V Tolerant Inputs and Outputs  
General Description  
The LCX125 contains four independent non-inverting buff-  
ers with 3-STATE outputs. The inputs tolerate voltages up  
to 7V allowing the interface of 5V systems to 3V systems.  
Features  
5V tolerant inputs and outputs  
2.3V–3.6V VCC specifications provided  
6.0 ns tPD max (VCC 3.3V), 10 A ICC max  
The 74LCX125 is fabricated with an advanced CMOS tech-  
nology to achieve high speed operation while maintaining  
CMOS low power dissipation.  
Power down high impedance inputs and outputs  
Supports live insertion/withdrawal (Note 1)  
24 mA output drive (VCC 3.0V)  
Implements patented noise/EMI reduction circuitry  
Latch-up performance exceeds JEDEC 78 conditions  
ESD performance:  
Human body model 2000V  
Machine model 100V  
Leadless Pb-Free DQFN package  
Note 1: To ensure the high-impedance state during power up or down, OE  
should be tied to V  
through a pull-up resistor: the minimum value of the  
CC  
resistor is determined by the current-sourcing capability of the driver.  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74LCX125M  
M14A  
M14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
74LCX125MX_NL  
(Note 3)  
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
74LCX125SJ  
M14D  
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74LCX125BQX  
(Note 2)  
MLP014A Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC  
MO-241, 2.5 x 3.0mm  
74LCX125MTC  
MTC14  
MTC14  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74LCX125MTCX_NL  
(Note 3)  
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
Device also available in Tape and Reel. Specify by appending suffix letter Xto the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Note 2: DQFN package available in Tape and Reel only.  
Note 3: _NLindicates Pb-Free package (per JEDED J-STD-020B). Device available in Tape and Reel only.  
© 2005 Fairchild Semiconductor Corporation  
DS012416  
www.fairchildsemi.com  

74LCX125SJ 替代型号

型号 品牌 替代类型 描述 数据表
74LCX125SJX FAIRCHILD

完全替代

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

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