74LCX11

更新时间： 2024-11-03 22:45:59

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		栅
页数	文件大小	规格书
11页	529K
描述
Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs

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数据手册

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74LCX11 数据手册

April 1995

Revised July 2005

74LCX11

Low Voltage Triple 3-Input AND Gate

with 5V Tolerant Inputs

General Description

Features

■ 5V tolerant inputs and outputs

The LCX11 is a triple 3-input AND gate with buffered out-

puts. LCX devices are designed for low voltage (2.5V or

3.3V) operation with the added capability of interfacing to a

5V signal environment.

■ 2.3V–3.6V V_CCspecifications provided

■ 6.0ns t_PDmax (V_CC3.3V), 10 A I_CCmax

■ Power down high impedance inputs and outputs

The 74LCX11 is fabricated with advanced CMOS technol-

ogy to achieve high speed operation while maintaining

CMOS low power dissipation.

■

24 mA output drive (V_CC3.0V)

■ Implements patented noise/EMI reduction circuitry

■ Latch-up performance exceeds JEDEC 78 conditions

■ ESD performance:

Human body model 2000V

Machine model 200V

■ Leadless DQFN Package

Ordering Code:

Package

Order Number

Package Description

Number

74LCX11M

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74LCX11MX_NL

(Note 1)

Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74LCX11SJ

M14D

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LCX11BQX

(Note 2)

MLP014A Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC

MO-241, 2.5 x 3.0mm

74LCX11MTC

MTC14

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74LCX11MTCX_NL

(Note 1)

Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

Pb-Free package per JEDEC J-STD-020B.

Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.

Note 2: DQFN package available in Tape and Reel only.

DS012426

www.fairchildsemi.com

12 3 4 5 6 7...11

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与74LCX11相关器件

型号	品牌	获取价格	描述	数据表
74LCX11_08	FAIRCHILD	获取价格	Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs
74LCX112	FAIRCHILD	获取价格	Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs
74LCX112M	FAIRCHILD	获取价格	Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs
74LCX112M	ROCHESTER	获取价格	LVC/LCX/Z SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
74LCX112M	ONSEMI	获取价格	低电压双 J-K 负向边触发触发器，带 5V 耐压输入
74LCX112MTC	FAIRCHILD	获取价格	Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs
74LCX112MTC	ROCHESTER	获取价格	LVC/LCX/Z SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
74LCX112MTC	ONSEMI	获取价格	低电压双 J-K 负向边触发触发器，带 5V 耐压输入
74LCX112MTC_NL	FAIRCHILD	获取价格	J-K Flip-Flop, LVC/LCX/Z Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Out
74LCX112MTCX	FAIRCHILD	获取价格	J-K-Type Flip-Flop