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74LCX06M_NL PDF预览

74LCX06M_NL

更新时间: 2024-11-05 19:41:47
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 光电二极管逻辑集成电路
页数 文件大小 规格书
8页 300K
描述
Inverter, LVC/LCX/Z Series, 6-Func, 1-Input, CMOS, PDSO14, 0.150 INCH, LEAD FREE, MS-012, SOIC-14

74LCX06M_NL 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.13系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G14JESD-609代码:e3
长度:8.6235 mm逻辑集成电路类型:INVERTER
功能数量:6输入次数:1
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C输出特性:OPEN-DRAIN
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
传播延迟(tpd):4.1 ns认证状态:Not Qualified
座面最大高度:1.753 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:3.9 mm
Base Number Matches:1

74LCX06M_NL 数据手册

 浏览型号74LCX06M_NL的Datasheet PDF文件第2页浏览型号74LCX06M_NL的Datasheet PDF文件第3页浏览型号74LCX06M_NL的Datasheet PDF文件第4页浏览型号74LCX06M_NL的Datasheet PDF文件第5页浏览型号74LCX06M_NL的Datasheet PDF文件第6页浏览型号74LCX06M_NL的Datasheet PDF文件第7页 
January 2008  
74LCX06  
Low Voltage Hex Inverter/Buffer with Open  
Drain Outputs  
Features  
General Description  
5V tolerant inputs  
The LCX06 contains six inverters/buffers. The inputs tol-  
erate voltages up to 7V allowing the interface of 5V sys-  
tems to 3V systems.  
2.3V–3.6V V specifications provided  
CC  
3.7ns t max. (V = 3.3V), 10µA I max.  
PD  
CC  
CC  
Power down high impedance inputs and outputs  
24mA output drive (V = 3.0V)  
Implements patented noise/EMI reduction circuitry  
Latch-up performance exceeds 500mA  
ESD performance:  
The outputs of the LCX06 are open drain and can be  
connected to other open drain outputs to implement  
active LOW wire AND or active HIGH wire OR functions.  
CC  
The 74LCX06 is fabricated with advanced CMOS tech-  
nology to achieve high speed operation while maintain-  
ing CMOS low power dissipation.  
– Human body model > 2000V  
– Machine model > 200V  
Ordering Information  
Package  
Order Number Number  
Package Description  
74LCX06M  
M14A  
M14D  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74LCX06SJ  
74LCX06MTC  
MTC14  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.  
All packages are lead free per JEDEC: J-STD-020B standard.  
Connection Diagram  
Logic Symbol  
IEEE/IEC  
Pin Description  
Pin Names  
Description  
A , B  
Inputs  
n
n
O
Outputs  
n
©1999 Fairchild Semiconductor Corporation  
74LCX06 Rev. 1.8.0  
www.fairchildsemi.com  

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