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74LCX06_08 PDF预览

74LCX06_08

更新时间: 2024-11-27 12:24:51
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
8页 329K
描述
74LCX06 Low Voltage Hex Inverter/Buffer with Open Drain Outputs

74LCX06_08 数据手册

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January 2008  
74LCX06  
Low Voltage Hex Inverter/Buffer with Open  
Drain Outputs  
Features  
General Description  
5V tolerant inputs  
The LCX06 contains six inverters/buffers. The inputs tol-  
erate voltages up to 7V allowing the interface of 5V sys-  
tems to 3V systems.  
2.3V–3.6V V specifications provided  
CC  
3.7ns t max. (V = 3.3V), 10µA I max.  
PD  
CC  
CC  
Power down high impedance inputs and outputs  
24mA output drive (V = 3.0V)  
Implements proprietary noise/EMI reduction circuitry  
Latch-up performance exceeds 500mA  
ESD performance:  
The outputs of the LCX06 are open drain and can be  
connected to other open drain outputs to implement  
active LOW wire AND or active HIGH wire OR functions.  
CC  
The 74LCX06 is fabricated with advanced CMOS tech-  
nology to achieve high speed operation while maintain-  
ing CMOS low power dissipation.  
– Human body model > 2000V  
– Machine model > 200V  
Ordering Information  
Package  
Order Number Number  
Package Description  
74LCX06M  
M14A  
M14D  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74LCX06SJ  
74LCX06MTC  
MTC14  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.  
All packages are lead free per JEDEC: J-STD-020B standard.  
Connection Diagram  
Logic Symbol  
IEEE/IEC  
Pin Description  
Pin Names  
Description  
A , B  
Inputs  
n
n
O
Outputs  
n
©1999 Fairchild Semiconductor Corporation  
74LCX06 Rev. 1.8.0  
www.fairchildsemi.com  

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