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74LCX02SJ PDF预览

74LCX02SJ

更新时间: 2024-11-03 22:22:07
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 85K
描述
Low Voltage Quad 2-Input NOR Gate

74LCX02SJ 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOP
包装说明:SOP, SOP14,.3针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.11
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-G14
JESD-609代码:e3长度:10.2 mm
负载电容(CL):50 pF逻辑集成电路类型:NOR GATE
最大I(ol):0.024 A湿度敏感等级:1
功能数量:4输入次数:2
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:RAIL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:5.2 ns
传播延迟(tpd):6.2 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:2.1 mm
子类别:Gates最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:5.3 mmBase Number Matches:1

74LCX02SJ 数据手册

 浏览型号74LCX02SJ的Datasheet PDF文件第2页浏览型号74LCX02SJ的Datasheet PDF文件第3页浏览型号74LCX02SJ的Datasheet PDF文件第4页浏览型号74LCX02SJ的Datasheet PDF文件第5页浏览型号74LCX02SJ的Datasheet PDF文件第6页浏览型号74LCX02SJ的Datasheet PDF文件第7页 
March 1995  
Revised June 1999  
74LCX02  
Low Voltage Quad 2-Input NOR Gate  
with 5V Tolerant Inputs  
General Description  
The LCX02 contains four 2-input NOR gates. The inputs  
tolerate voltages up to 7V allowing the interface of 5V sys-  
tems to 3V systems.  
Features  
5V tolerant inputs  
2.3V–3.6V VCC specification provided  
5.2 ns tPD max (VCC = 3.3V), 10 µA ICC max  
The 74LCX02 is fabricated with advanced CMOS technol-  
ogy to achieve high speed operation while maintaining  
CMOS low power dissipation.  
Power down high impedance inputs and outputs  
±24 mA output drive (VCC = 3.0V)  
Implements patented noise/EMI reduction circuitry  
Latch-up performance exceeds 500 mA  
ESD performance:  
Human body model > 2000V  
Machine model > 200V  
Ordering Code:  
Order Number Package Number  
Package Description  
74LCX02M  
M14A  
M14D  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74LCX02SJ  
74LCX02MTC  
MTC14  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
An, Bn  
On  
Description  
Inputs  
Outputs  
© 1999 Fairchild Semiconductor Corporation  
ds012409.prf  
www.fairchildsemi.com  

74LCX02SJ 替代型号

型号 品牌 替代类型 描述 数据表
74LCX02SJX FAIRCHILD

完全替代

Low Voltage Quad 2-Input NOR Gate with 5V Tolerant Inputs

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带有 5 V 容差输入的低电压六通道逆变器