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74LCX00YTTR

更新时间： 2024-01-27 13:12:28

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		/
页数	文件大小	规格书
11页	504K
描述
Low voltage CMOS QUAD 2-Input NAND gate with 5V tolerant inputs

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中文翻译

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数据手册

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74LCX00YTTR 数据手册

March 1995

Revised January 2005

74LCX00

Low Voltage Quad 2-Input NAND Gate

with 5V Tolerant Inputs

General Description

The LCX00 contains four 2-input NAND gates. The inputs

tolerate voltages up to 7V allowing the interface of 5V sys-

tems to 3V systems.

Features

■ 5V tolerant inputs

■ 2.3V–3.6V V_CCspecifications provided

■ 5.2 ns t_PDmax (V_CC= 3.3V), 10 µA I_CCmax

The 74LCX00 is fabricated with advanced CMOS technol-

ogy to achieve high speed operation while maintaining

CMOS low power dissipation.

■ Power down high impedance inputs and outputs

■ ±24 mA output drive (V_CC= 3.0V)

■ Implements patented noise/EMI reduction circuitry

■ Latch-up performance exceeds JEDEC 78 conditions

■ ESD performance:

Human body model > 2000V

Machine model > 200V

■ Leadless Pb-Free DQFN package

Ordering Code:

Package

Order Number

Package Description

Number

74LCX00M

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74LCX00MX_NL

(Note 2)

Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74LCX00SJ

M14D

Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LCX00BQX

(Note 1)

MLP014A Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC

MO-241, 2.5 x 3.0mm

74LCX00MTC

MTC14

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74LCX00MTCX_NL

(Note 2)

Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Pb-Free package per JEDEC J-STD-020B.

Note 1: DQFN package available in Tape and Reel only.

Note 2: “_NL” package available in Tape and Reel only.

DS012408

www.fairchildsemi.com

12 3 4 5 6 7...11

中文翻译

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