是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
零件包装代码: | DIP | 包装说明: | DIP, DIP18,.3 |
针数: | 18 | Reach Compliance Code: | unknown |
ECCN代码: | EAR99 | HTS代码: | 8542.32.00.71 |
风险等级: | 5.92 | 最长访问时间: | 108 ns |
其他特性: | REGISTER BASED; BUBBLE BACK 2.7US | 最大时钟频率 (fCLK): | 12 MHz |
周期时间: | 83.33 ns | JESD-30 代码: | R-PDIP-T18 |
内存密度: | 320 bit | 内存集成电路类型: | OTHER FIFO |
内存宽度: | 5 | 功能数量: | 1 |
端子数量: | 18 | 字数: | 64 words |
字数代码: | 64 | 工作模式: | ASYNCHRONOUS |
最高工作温度: | 125 °C | 最低工作温度: | -40 °C |
组织: | 64X5 | 输出特性: | 3-STATE |
可输出: | YES | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | DIP | 封装等效代码: | DIP18,.3 |
封装形状: | RECTANGULAR | 封装形式: | IN-LINE |
并行/串行: | PARALLEL | 电源: | 5 V |
认证状态: | Not Qualified | 子类别: | FIFOs |
最大压摆率: | 0.001 mA | 最大供电电压 (Vsup): | 5.5 V |
最小供电电压 (Vsup): | 4.5 V | 标称供电电压 (Vsup): | 5 V |
表面贴装: | NO | 技术: | CMOS |
温度等级: | AUTOMOTIVE | 端子形式: | THROUGH-HOLE |
端子节距: | 2.54 mm | 端子位置: | DUAL |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
74HCT7404PW | NXP |
获取价格 |
IC 64 X 5 OTHER FIFO, PDSO20, FIFO | |
74HCT7404PW-T | NXP |
获取价格 |
IC 64 X 5 OTHER FIFO, PDSO20, FIFO | |
74HCT74BQ | NXP |
获取价格 |
Dual D-type flip-flop with set and reset; positive-edge trigger | |
74HCT74BQ | NEXPERIA |
获取价格 |
Dual D-type flip-flop with set and reset; positive edge-triggerProduction | |
74HCT74BQ,115 | NXP |
获取价格 |
74HC(T)74 - Dual D-type flip-flop with set and reset; positive-edge trigger QFN 14-Pin | |
74HCT74BQ-Q100 | NEXPERIA |
获取价格 |
Dual D-type flip-flop with set and reset; positive edge-trigger | |
74HCT74BQ-Q100,115 | NXP |
获取价格 |
74HC(T)74-Q100 - Dual D-type flip-flop with set and reset; positive edge-trigger QFN 14-Pi | |
74HCT74BZ | NEXPERIA |
获取价格 |
Dual D-type flip-flop with set and reset; positive edge-triggerProduction | |
74HCT74D | NXP |
获取价格 |
Dual D-type flip-flop with set and reset; positive-edge trigger | |
74HCT74D | NEXPERIA |
获取价格 |
Dual D-type flip-flop with set and reset; positive edge-triggerProduction |