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74HCT574PW-Q100,11 PDF预览

74HCT574PW-Q100,11

更新时间: 2024-11-23 14:47:03
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
17页 138K
描述
74HC(T)574-Q100 - Octal D-type flip-flop; positive edge-trigger; 3-state TSSOP2 20-Pin

74HCT574PW-Q100,11 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:TSSOP2包装说明:4.40 MM, PLASTIC, MO-153, SOT360-1, TSSOP-20
针数:20Reach Compliance Code:compliant
风险等级:5.79Base Number Matches:1

74HCT574PW-Q100,11 数据手册

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74HC574-Q100; 74HCT574-Q100  
Octal D-type flip-flop; positive edge-trigger; 3-state  
Rev. 1 — 2 August 2012  
Product data sheet  
1. General description  
The 74HC574-Q100; 74HCT574-Q100 is a high-speed Si-gate CMOS device and is pin  
compatible with Low-power Schottky TTL. It is specified in compliance with JEDEC  
standard no. 7A.  
The 74HC574-Q100; 74HCT574-Q100 are octal D-type flip-flops featuring separate  
D-type inputs for each flip-flop and 3-state outputs for bus-oriented applications. A clock  
(CP) and an output enable (OE) input are common to all flip-flops. The 8 flip-flops store  
the state of their individual D-inputs that meet the set-up and hold times requirements on  
the LOW-to-HIGH CP transition. When OE is LOW the contents of the 8 flip-flops are  
available at the outputs. When OE is HIGH, the outputs go to the high-impedance  
OFF-state. Operation of the OE input does not affect the state of the flip-flops.  
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
3-state non-inverting outputs for bus-oriented applications  
8-bit positive, edge-triggered register  
Common 3-state output enable input  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  
Multiple package options  
 
 

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