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74HCT573PW-Q100 PDF预览

74HCT573PW-Q100

更新时间: 2024-11-23 12:22:27
品牌 Logo 应用领域
恩智浦 - NXP 总线驱动器总线收发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
19页 253K
描述
Octal D-type transparent latch; 3-state

74HCT573PW-Q100 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:TSSOP,Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.58
系列:HCTJESD-30 代码:R-PDSO-G20
长度:6.5 mm逻辑集成电路类型:BUS DRIVER
湿度敏感等级:1位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
传播延迟(tpd):53 ns筛选级别:AEC-Q100
座面最大高度:1.1 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
Base Number Matches:1

74HCT573PW-Q100 数据手册

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74HC573-Q100; 74HCT573-Q100  
Octal D-type transparent latch; 3-state  
Rev. 2 — 16 August 2012  
Product data sheet  
1. General description  
The 74HC573-Q100; 74HCT573-Q100 is a high-speed Si-gate CMOS device and is pin  
compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with  
JEDEC standard no. 7A.  
The 74HC573-Q100; 74HCT573-Q100 has octal D-type transparent latches featuring  
separate D-type inputs for each latch and 3-state true outputs for bus-oriented  
applications. A latch enable (LE) input and an output enable (OE) input are common to all  
latches.  
When LE is HIGH, data at the Dn inputs enter the latches. In this condition, the latches are  
transparent, i.e. a latch output changes state each time its corresponding D input  
changes.  
When LE is LOW the latches store the information that was present at the D-inputs a  
set-up time preceding the HIGH-to-LOW transition of LE. When OE is LOW, the contents  
of the 8 latches are available at the outputs. When OE is HIGH, the outputs go to the  
high-impedance OFF-state. Operation of the OE input does not affect the state of the  
latches.  
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Input levels:  
For 74HC573: CMOS level  
For 74HCT573: TTL level  
Inputs and outputs on opposite sides of package allowing easy interface with  
microprocessors  
Useful as input or output port for microprocessors and microcomputers  
3-state non-inverting outputs for bus-oriented applications  
Common 3-state output enable input  
Multiple package options  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  

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