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74HCT423BQ PDF预览

74HCT423BQ

更新时间: 2024-11-20 06:31:55
品牌 Logo 应用领域
恩智浦 - NXP 振荡器
页数 文件大小 规格书
23页 150K
描述
Dual retriggerable monostable multivibrator with reset

74HCT423BQ 数据手册

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74HC423; 74HCT423  
Dual retriggerable monostable multivibrator with reset  
Rev. 03 — 24 July 2008  
Product data sheet  
1. General description  
74HC423; 74HCT423 are high-speed Si-gate CMOS devices that are pin compatible with  
low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC  
standard no. 7A.  
The 74HC423; 74HCT423 dual retriggerable monostable multivibrator with reset has two  
methods of output pulse width control.  
1. The minimum pulse width is essentially determined by the selection of an external  
resistor (REXT) and capacitor (CEXT), see Section 12.1.  
2. Once triggered, the basic output pulse width may be extended by retriggering the  
gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By  
repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made  
as long as desired. When nRD is LOW, it forces the nQ output LOW, the nQ output  
HIGH and also inhibits the triggering. Figure 10 and Figure 11 illustrate pulse control  
by reset.  
The nA and nB inputs’ Schmitt trigger action makes them highly tolerant to slower input  
rise and fall times.  
The 74HC423; 74HCT423 are identical to the 74HC123; 74HCT123 except that they  
cannot be triggered via the reset input.  
2. Features  
I DC triggered from active HIGH or active LOW inputs  
I Retriggerable for very long pulses up to 100% duty factor  
I Direct reset terminates output pulse  
I Schmitt-trigger action on all inputs except for the reset input  
I Complies with JEDEC standard no. 7A  
I ESD protection:  
N HBM JESD22-A114E exceeds 2000 V  
N MM JESD22-A115-A exceeds 200 V  
I Specified from 40 °C to +85 °C and from 40 °C to +125 °C  

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