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74HCT4094DB-Q100 PDF预览

74HCT4094DB-Q100

更新时间: 2024-11-20 14:47:03
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
21页 166K
描述
HCT SERIES, 8-BIT RIGHT SERIAL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16, 5.30 MM, PLASTIC, MO-150, SOT338-1, SSOP-16

74HCT4094DB-Q100 技术参数

是否Rohs认证:符合生命周期:Transferred
零件包装代码:SSOP包装说明:5.30 MM, PLASTIC, MO-150, SOT338-1, SSOP-16
针数:16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.6
Is Samacsys:N计数方向:RIGHT
系列:HCTJESD-30 代码:R-PDSO-G16
长度:6.2 mm逻辑集成电路类型:SERIAL IN PARALLEL OUT
湿度敏感等级:1位数:8
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):260传播延迟(tpd):65 ns
筛选级别:AEC-Q100座面最大高度:2 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
触发器类型:POSITIVE EDGE宽度:5.3 mm
最小 fmax:20 MHzBase Number Matches:1

74HCT4094DB-Q100 数据手册

 浏览型号74HCT4094DB-Q100的Datasheet PDF文件第2页浏览型号74HCT4094DB-Q100的Datasheet PDF文件第3页浏览型号74HCT4094DB-Q100的Datasheet PDF文件第4页浏览型号74HCT4094DB-Q100的Datasheet PDF文件第5页浏览型号74HCT4094DB-Q100的Datasheet PDF文件第6页浏览型号74HCT4094DB-Q100的Datasheet PDF文件第7页 
74HC4094-Q100; 74HCT4094-Q100  
8-stage shift-and-store bus register  
Rev. 1 — 30 January 2013  
Product data sheet  
1. General description  
The 74HC4094-Q100; 74HCT4094-Q100 is an 8-bit serial-in/serial or parallel-out shift  
register with a storage register and 3-state outputs. Both the shift and storage register  
have separate clocks. The device features a serial input (D) and two serial outputs (QS1  
and QS2) to enable cascading. Data is shifted on the LOW-to-HIGH transitions of the CP  
input. Data is available at QS1 on the LOW-to-HIGH transitions of the CP input to allow  
cascading when clock edges are fast. The same data is available at QS2 on the next  
HIGH-to-LOW transition of the CP input to allow cascading when clock edges are slow.  
The data in the shift register is transferred to the storage register when the STR input is  
HIGH. Data in the storage register appears at the outputs whenever the output enable  
input (OE) is HIGH. A LOW on OE causes the outputs to assume a high-impedance  
OFF-state. Operation of the OE input does not affect the state of the registers. Inputs  
include clamp diodes that enable the use of current limiting resistors to interface inputs to  
voltages in excess of VCC  
.
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Complies with JEDEC standard JESD7A  
Input levels:  
For 74HC4094-Q100: CMOS level  
For 74HCT4094-Q100: TTL level  
Low-power dissipation  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  
3. Applications  
Serial-to-parallel data conversion  
Remote control holding register  
 
 
 

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