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74HCT4052DB,118 PDF预览

74HCT4052DB,118

更新时间: 2024-01-07 15:12:51
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管
页数 文件大小 规格书
27页 260K
描述
74HC(T)4052 - Dual 4-channel analog multiplexer/demultiplexer SSOP1 16-Pin

74HCT4052DB,118 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:SSOP1包装说明:SSOP, SSOP16,.3
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:6.95
模拟集成电路 - 其他类型:DIFFERENTIAL MULTIPLEXERJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:6.2 mm
湿度敏感等级:1负电源电压最大值(Vsup):-5 V
负电源电压最小值(Vsup):-1 V标称负供电电压 (Vsup):-4.5 V
信道数量:4功能数量:1
端子数量:16标称断态隔离度:50 dB
通态电阻匹配规范:6 Ω最大通态电阻 (Ron):195 Ω
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP16,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:5,GND/-5 V认证状态:Not Qualified
座面最大高度:2 mm最大信号电流:0.025 A
子类别:Multiplexer or Switches最大供电电流 (Isup):0.32 mA
最大供电电压 (Vsup):5 V最小供电电压 (Vsup):1 V
标称供电电压 (Vsup):4.5 V表面贴装:YES
最长断开时间:57 ns最长接通时间:72 ns
切换:BREAK-BEFORE-MAKE技术:CMOS
温度等级:AUTOMOTIVE端子面层:NICKEL PALLADIUM GOLD
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:5.3 mmBase Number Matches:1

74HCT4052DB,118 数据手册

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74HC4052; 74HCT4052  
Dual 4-channel analog multiplexer/demultiplexer  
Rev. 06 — 11 January 2010  
Product data sheet  
1. General description  
The 74HC4052; 74HCT4052 is a high-speed Si-gate CMOS device and is pin compatible  
with the HEF4052B. The device is specified in compliance with JEDEC standard no. 7A.  
The 74HC4052; 74HCT4052 is a dual 4-channel analog multiplexer/demultiplexer with  
common select logic. Each multiplexer has four independent inputs/outputs (pins nY0 to  
nY3) and a common input/output (pin nZ). The common channel select logics include two  
digital select inputs (pins S0 and S1) and an active LOW enable input (pin E). When  
pin E = LOW, one of the four switches is selected (low-impedance ON-state) with pins S0  
and S1. When pin E = HIGH, all switches are in the high-impedance OFF-state,  
independent of pins S0 and S1.  
VCC and GND are the supply voltage pins for the digital control inputs (pins S0, S1 and E).  
The VCC to GND ranges are 2.0 V to 10.0 V for the 74HC4052 and 4.5 V to 5.5 V for the  
74HCT4052. The analog inputs/outputs (pins nY0 to nY3 and nZ) can swing between VCC  
as a positive limit and VEE as a negative limit. VCC VEE may not exceed 10.0 V.  
For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically  
ground).  
2. Features  
„ Wide analog input voltage range from 5 V to +5 V  
„ Low ON resistance:  
‹ 80 Ω (typical) at VCC VEE = 4.5 V  
‹ 70 Ω (typical) at VCC VEE = 6.0 V  
‹ 60 Ω (typical) at VCC VEE = 9.0 V  
„ Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals  
„ Typical ‘break before make’ built-in  
„ Complies with JEDEC standard no. 7A  
„ ESD protection:  
‹ HBM JESD22-A114F exceeds 2000 V  
‹ MM JESD22-A115-A exceeds 200 V  
„ Specified from 40 °C to +85 °C and 40 °C to +125 °C  
3. Applications  
„ Analog multiplexing and demultiplexing  
„ Digital multiplexing and demultiplexing  
„ Signal gating  
 
 
 

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