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74HCT32DTR2G PDF预览

74HCT32DTR2G

更新时间: 2024-01-09 01:33:04
品牌 Logo 应用领域
安森美 - ONSEMI 逻辑集成电路光电二极管
页数 文件大小 规格书
8页 124K
描述
Quad 2−Input OR Gate with LSTTL−Compatible Inputs

74HCT32DTR2G 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP14,.25
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:7.04系列:HCT
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:OR GATE最大I(ol):0.004 A
湿度敏感等级:1功能数量:4
输入次数:2端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
Prop。Delay @ Nom-Sup:22 ns传播延迟(tpd):22 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:1.2 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:4.4 mm
Base Number Matches:1

74HCT32DTR2G 数据手册

 浏览型号74HCT32DTR2G的Datasheet PDF文件第2页浏览型号74HCT32DTR2G的Datasheet PDF文件第3页浏览型号74HCT32DTR2G的Datasheet PDF文件第4页浏览型号74HCT32DTR2G的Datasheet PDF文件第5页浏览型号74HCT32DTR2G的Datasheet PDF文件第6页浏览型号74HCT32DTR2G的Datasheet PDF文件第7页 
74HCT32  
Quad 2−Input OR Gate with  
LSTTL−Compatible Inputs  
HighPerformance SiliconGate CMOS  
The 74HCT32 is identical in pinout to the LS32. The device has  
TTLcompatible inputs.  
http://onsemi.com  
MARKING  
Features  
DIAGRAMS  
Output Drive Capability: 10 LSTTL Loads  
TTL/NMOSCompatible Input Levels  
Outputs Directly Interface to CMOS, NMOS and TTL  
Operating Voltage Range: 4.5 to 5.5 V  
Low Input Current: 1.0 mA  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance With the JEDEC Standard No. 7A Requirements  
ESD Performance: HBM > 2000 V; Machine Model > 200 V  
Chip Complexity: 48 FETs or 12 Equivalent Gates  
These are PbFree Devices  
14  
SOIC14  
D SUFFIX  
CASE 751A  
HCT32G  
AWLYWW  
14  
14  
1
1
14  
HCT  
32  
TSSOP14  
DT SUFFIX  
CASE 948G  
ALYWG  
1
G
1
HCT32 = Device Code  
A
= Assembly Location  
L, WL  
Y
= Wafer Lot  
= Year  
W, WW = Work Week  
G or G  
= PbFree Package  
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
©
Semiconductor Components Industries, LLC, 2007  
1
Publication Order Number:  
March, 2007 Rev. 0  
74HCT32/D  

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