74HCT245

更新时间： 2024-11-19 22:56:19

品牌	Logo	应用领域
恩智浦 - NXP		总线收发器
页数	文件大小	规格书
22页	128K
描述
Octal bus transceiver; 3-state

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74HCT245 数据手册

74HC245; 74HCT245

Octal bus tranceiver; 3-state

Rev. 03 — 31 January 2005

Product data sheet

1. General description

The 74HC245; 74HCT245 is a high-speed Si-gate CMOS device and is pin compatible

with Low-Power Schottky TTL (LSTTL).

The 74HC245; 74HCT245 is an octal transceiver featuring non-inverting 3-state bus

compatible outputs in both send and receive directions. The 74HC245; 74HCT245

features an output enable input (OE) for easy cascading and a send/receive input (DIR)

for direction control. OE controls the outputs so that the buses are effectively isolated.

The 74HC245; 74HCT245 is similar to the 74HC640; 74HCT640 but has true

(non-inverting) outputs.

2. Features

■ Octal bidirectional bus interface

■ Non-inverting 3-state outputs

■ Multiple package options

■ Complies with JEDEC standard no. 7A

■ ESD protection:

◆ HBM EIA/JESD22-A114-B exceeds 2000 V

◆ MM EIA/JESD22-A115-A exceeds 200 V

■ Speciﬁed from −40 °C to +85 °C and from −40 °C to +125 °C

3. Quick reference data

Table 1:

Quick reference data

GND = 0 V; T_amb= 25 °C; t_r= t_f= 6 ns.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Type 74HC245

t_PHL, t_PLH

propagation delay

C_L= 15 pF;

An to Bn or Bn to An

V_CC= 5 V

C_I

input capacitance

3.5

C_I/O

C_PD

input/output capacitance

[1]

power dissipation

capacitance per

transceiver

V_I= GND to V_CC

Type 74HCT245

t_PHL, t_PLHpropagation delay

An to Bn or Bn to An

C_L= 15 pF;

_CC= 5 V

12 3 4 5 6 7...22

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