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74HCT174D-Q100 PDF预览

74HCT174D-Q100

更新时间: 2024-11-04 15:26:35
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
16页 152K
描述
HCT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO16, 3.90 MM, PLASTIC, MS-012, SOT109-1, SOP-16

74HCT174D-Q100 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:3.90 MM, PLASTIC, MS-012, SOT109-1, SOP-16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.59
系列:HCTJESD-30 代码:R-PDSO-G16
长度:9.9 mm逻辑集成电路类型:D FLIP-FLOP
湿度敏感等级:1位数:6
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-40 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
传播延迟(tpd):53 ns筛选级别:AEC-Q100
座面最大高度:1.75 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30触发器类型:POSITIVE EDGE
宽度:3.9 mm最小 fmax:20 MHz
Base Number Matches:1

74HCT174D-Q100 数据手册

 浏览型号74HCT174D-Q100的Datasheet PDF文件第2页浏览型号74HCT174D-Q100的Datasheet PDF文件第3页浏览型号74HCT174D-Q100的Datasheet PDF文件第4页浏览型号74HCT174D-Q100的Datasheet PDF文件第5页浏览型号74HCT174D-Q100的Datasheet PDF文件第6页浏览型号74HCT174D-Q100的Datasheet PDF文件第7页 
74HC174-Q100; 74HCT174-Q100  
Hex D-type flip-flop with reset; positive-edge trigger  
Rev. 1 — 17 April 2013  
Product data sheet  
1. General description  
The 74HC174-Q100; 74HCT174-Q100 are hex positive edge-triggered D-type flip-flops  
with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master  
reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the  
set-up and hold time requirements on the LOW-to-HIGH clock transition is stored in the  
flip-flop and appears at the Q output. A LOW on MR causes the flip-flops and outputs to  
be reset LOW. Inputs include clamp diodes. This enables the use of current limiting  
resistors to interface inputs to voltages in excess of VCC  
.
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Input levels:  
For 74HC174-Q100: CMOS level  
For 74HCT174-Q100: TTL level  
Six edge-triggered D-type flip-flops  
Asynchronous master reset  
Complies with JEDEC standard no. 7A  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  
Multiple package options  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74HC174D-Q100  
74HCT174D-Q100  
74HC174PW-Q100  
74HCT174PW-Q100  
40 C to +125 C  
SO16  
plastic small outline package; 16 leads; body width SOT109-1  
3.9 mm  
40 C to +125 C  
TSSOP16  
plastic thin shrink small outline package; 16 leads; SOT403-1  
body width 4.4 mm  
 
 
 

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