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74HCT139D-Q100 PDF预览

74HCT139D-Q100

更新时间: 2024-11-21 11:01:31
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
18页 762K
描述
Dual 2-to-4 line decoder/demultiplexerProduction

74HCT139D-Q100 数据手册

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74HC139-Q100; 74HCT139-Q100  
Dual 2-to-4 line decoder/demultiplexer  
Rev. 1 — 19 June 2014  
Product data sheet  
1. General description  
The 74HC139-Q100; 74HCT139-Q100 decodes two binary weighted address inputs  
(nA0, nA1) to four mutually exclusive outputs (nY0 to nY3). Each decoder features an  
enable input (nE). When nE is HIGH all outputs are forced HIGH. The enable input can be  
used as the data input for a 1-to-4 demultiplexer application. Inputs include clamp diodes  
that enable the use of current limiting resistors to interface inputs to voltages in excess of  
VCC  
.
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Input levels:  
For 74HC139-Q100: CMOS level  
For 74HCT139-Q100: TTL level  
Demultiplexing capability  
2 independent 2-to-4 decoders  
Multifunction capability  
Suitable for memory decoding, data routing or code conversion  
Complies with JEDEC standard no. 7A  
Active LOW mutually exclusive outputs  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  
Multiple package options  

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