生命周期: | Obsolete | 包装说明: | DIP, |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.19 | 系列: | HCT |
JESD-30 代码: | R-PDIP-T16 | 长度: | 19.025 mm |
负载电容(CL): | 50 pF | 逻辑集成电路类型: | J-KBAR FLIP-FLOP |
位数: | 2 | 功能数量: | 2 |
端子数量: | 16 | 最高工作温度: | 125 °C |
最低工作温度: | -40 °C | 输出极性: | COMPLEMENTARY |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | DIP |
封装形状: | RECTANGULAR | 封装形式: | IN-LINE |
传播延迟(tpd): | 53 ns | 认证状态: | Not Qualified |
座面最大高度: | 4.2 mm | 最大供电电压 (Vsup): | 5.5 V |
最小供电电压 (Vsup): | 4.5 V | 标称供电电压 (Vsup): | 5 V |
表面贴装: | NO | 技术: | CMOS |
温度等级: | AUTOMOTIVE | 端子形式: | THROUGH-HOLE |
端子节距: | 2.54 mm | 端子位置: | DUAL |
触发器类型: | POSITIVE EDGE | 宽度: | 7.62 mm |
最小 fmax: | 18 MHz | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
74HCT109PW | NXP |
获取价格 |
Dual JK flip-flop with set and reset; positive-edge trigger | |
74HCT109PW | NEXPERIA |
获取价格 |
Dual JK flip-flop with set and reset; positive-edge-triggerProduction | |
74HCT109PW,118 | NXP |
获取价格 |
74HC(T)109 - Dual JK flip-flop with set and reset; positive-edge trigger TSSOP 16-Pin | |
74HCT109PW-Q100 | NEXPERIA |
获取价格 |
Dual JK flip-flop with set and reset; positive-edge-triggerProduction | |
74HCT109PW-T | NXP |
获取价格 |
IC HCT SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 | |
74HCT10D | NXP |
获取价格 |
Triple 3-input NAND gate | |
74HCT10D | NEXPERIA |
获取价格 |
Triple 3-input NAND gateProduction | |
74HCT10D,652 | NXP |
获取价格 |
74HC(T)10 - Triple 3-input NAND gate SOIC 14-Pin | |
74HCT10D.653 | NXP |
获取价格 |
Triple 3-input NAND gate | |
74HCT10DB | NXP |
获取价格 |
Triple 3-input NAND gate |