74HC4060; 74HCT4060
14-stage binary ripple counter with oscillator
Rev. 6 — 7 September 2021
Product data sheet
1. General description
The 74HC4060; 74HCT4060 is a 14-stage ripple-carry counter/divider and oscillator with three
oscillator terminals (RS, RTC and CTC), ten buffered parallel outputs (Q3 to Q9 and Q11 to Q13)
and an overriding asynchronous master reset (MR). The oscillator configuration allows design of
either RC or crystal oscillator circuits. The oscillator may be replaced by an external clock signal
at input RS. In this case, keep the oscillator pins (RTC and CTC) floating. The counter advances
on the HIGH-to-LOW transition of RS. A HIGH level on MR clears all counter stages and forces all
outputs LOW, independent of the other input conditions. Inputs include clamp diodes. This enables
the use of current limiting resistors to interface inputs to voltages in excess of VCC
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2. Features and benefits
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Wide supply voltage range from 2.0 to 6.0 V
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CMOS low power dissipation
High noise immunity
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
All active components on chip
RC or crystal oscillator configuration
Input levels:
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For 74HC4060: CMOS level
For 74HCT4060: TTL level
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Complies with JEDEC standards:
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JESD8C (2.7 V to 3.6 V)
JESD7A (2.0 V to 6.0 V)
ESD protection:
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HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
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Multiple package options
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
3. Applications
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Control counters
Timers
Frequency dividers
Time-delay circuits