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74HC258D,653 PDF预览

74HC258D,653

更新时间: 2024-01-13 12:19:16
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管逻辑集成电路
页数 文件大小 规格书
14页 93K
描述
74HC258 - Quad 2-input multiplexer; 3-state; inverting SOP 16-Pin

74HC258D,653 技术参数

Source Url Status Check Date:2013-06-14 00:00:00是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOP
包装说明:SOP, SOP16,.25针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.32系列:HC/UH
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:9.9 mm负载电容(CL):50 pF
逻辑集成电路类型:MULTIPLEXER最大I(ol):0.006 A
湿度敏感等级:1功能数量:4
输入次数:2输出次数:1
端子数量:16最高工作温度:125 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:2/6 VProp。Delay @ Nom-Sup:29 ns
传播延迟(tpd):145 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Multiplexer/Demultiplexers
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3.9 mm
Base Number Matches:1

74HC258D,653 数据手册

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74HC258  
Quad 2-input multiplexer; 3-state; inverting  
Rev. 04 — 14 April 2008  
Product data sheet  
1. General description  
The 74HC258 is a high-speed Si-gate CMOS device and is pin compatible with low power  
Schottky TTL (LSTTL). The 74HC258 is specified in compliance with JEDEC  
standard no. 7A.  
The 74HC258 has four identical 2-input multiplexers with 3-state outputs, which select  
4 bits of data from two sources and is controlled by a common data select input (S).  
The data inputs from source 0 (1I0 to 4I0) are selected when input S is LOW and the data  
inputs from source 1 (1I1 to 4I1) are selected when S is HIGH.  
Data appears at the outputs (1Y to 4Y) in inverted form from the select inputs.  
The 74HC258 is the logic implementation of a 4-pole, 2-position switch, where the position  
of the switch is determined by the logic levels applied to S. The outputs are forced to a  
high-impedance OFF-state when OE is HIGH.  
The logic equations for the outputs are:  
1Y = OE × (1I1 × S + 1I0 × S)  
2Y = OE × (2I1 × S + 2I0 × S)  
3Y = OE × (3I1 × S + 3I0 × S)  
4Y = OE × (4I1 × S + 4I0 × S)  
The 74HC258 is identical to the 74HC257 but has inverting outputs.  
2. Features  
I 3-state outputs interface directly with system bus  
I Low-power dissipation  
I Inverting data path  
I Complies with JEDEC standard no. 7A  
I ESD protection:  
N HBM JESD22-A114E exceeds 2000 V  
N MM JESD22-A115-A exceeds 200 V  
I Multiple package options  
I Specified from 40 °C to +85 °C and from 40 °C to +125 °C.  
 
 

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