Datasheet > 74HC193N,652

74HC193N,652

更新时间： 2024-11-20 06:48:43

品牌	Logo	应用领域
恩智浦 - NXP		光电二极管输出元件逻辑集成电路触发器
页数	文件大小	规格书
30页	179K
描述
74HC(T)193 - Presettable synchronous 4-bit binary up, down counter DIP 16-Pin

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74HC193N,652 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	DIP	包装说明：	DIP, DIP16,.3
针数：	16	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	7.72
其他特性：	TCO UP AND TCO DOWN OUTPUTS; SEPARATE UP/DOWN CLOCK	计数方向：	BIDIRECTIONAL
系列：	HC/UH	JESD-30 代码：	R-PDIP-T16
JESD-609代码：	e4	长度：	19.025 mm
负载电容（CL）：	50 pF	负载/预设输入：	YES
逻辑集成电路类型：	BINARY COUNTER	最大频率@ Nom-Sup：	13000000 Hz
最大I（ol）：	0.004 A	工作模式：	SYNCHRONOUS
位数：	4	功能数量：	1
端子数量：	16	最高工作温度：	125 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	DIP	封装等效代码：	DIP16,.3
封装形状：	RECTANGULAR	封装形式：	IN-LINE
包装方法：	BULK PACK	峰值回流温度（摄氏度）：	260
电源：	2/6 V	传播延迟（tpd）：	65 ns
认证状态：	Not Qualified	座面最大高度：	4.2 mm
子类别：	Counters	最大供电电压 (Vsup)：	6 V
最小供电电压 (Vsup)：	2 V	标称供电电压 (Vsup)：	5 V
表面贴装：	NO	技术：	CMOS
温度等级：	AUTOMOTIVE	端子面层：	NICKEL PALLADIUM GOLD
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	30
触发器类型：	POSITIVE EDGE	宽度：	7.62 mm
最小 fmax：	13 MHz	Base Number Matches：	1

74HC193N,652 数据手册

74HC193; 74HCT193

Presettable synchronous 4-bit binary up/down counter

Rev. 4 — 24 June 2013

Product data sheet

1. General description

The 74HC193; 74HCT193 is a 4-bit synchronous binary up/down counter. Separate

up/down clocks, CPU and CPD respectively, simplify operation. The outputs change state

synchronously with the LOW-to-HIGH transition of either clock input. If the CPU clock is

pulsed while CPD is held HIGH, the device will count up. If the CPD clock is pulsed while

CPU is held HIGH, the device will count down. Only one clock input can be held HIGH at

any time to guarantee predictable behaviour. The device can be cleared at any time by the

asynchronous master reset input (MR); it may also be loaded in parallel by activating the

asynchronous parallel load input (PL). The terminal count up (TCU) and terminal count

down (TCD) outputs are normally HIGH. When the circuit has reached the maximum

count state of 15, the next HIGH-to-LOW transition of CPU will cause TCU to go LOW.

TCU will stay LOW until CPU goes HIGH again, duplicating the count up clock. Likewise,

the TCD output will go LOW when the circuit is in the zero state and the CPD goes LOW.

The terminal count outputs can be used as the clock input signals to the next higher order

circuit in a multistage counter, since they duplicate the clock waveforms. Multistage

counters will not be fully synchronous, since there is a slight delay time difference added

for each stage that is added. The counter may be preset by the asynchronous parallel

load capability of the circuit. Information present on the parallel data inputs (D0 to D3) is

loaded into the counter and appears on the outputs (Q0 to Q3) regardless of the

conditions of the clock inputs when the parallel load (PL) input is LOW. A HIGH level on

the master reset (MR) input will disable the parallel load gates, override both clock inputs

and set all outputs (Q0 to Q3) LOW. If one of the clock inputs is LOW during and after a

reset or load operation, the next LOW-to-HIGH transition of that clock will be interpreted

as a legitimate signal and will be counted. Inputs include clamp diodes. This enables the

use of current limiting resistors to interface inputs to voltages in excess of V_CC

2. Features and benefits

 Input levels:

 For 74HC193: CMOS level

 For 74HCT193: TTL level

 Synchronous reversible 4-bit binary counting

 Asynchronous parallel load

 Asynchronous reset

 Expandable without external logic

 Complies with JEDEC standard no. 7A

 ESD protection:

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V.

12 3 4 5 6 7...30

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与74HC193N,652相关器件

型号	品牌	获取价格	描述	数据表
74HC193NB	NXP	获取价格	HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PDIP16
74HC193PW	NXP	获取价格	Presettable synchronous 4-bit binary up/down counter
74HC193PW	NEXPERIA	获取价格	Presettable synchronous 4-bit binary up/down counterProduction
74HC193PW,118	NXP	获取价格	74HC(T)193 - Presettable synchronous 4-bit binary up, down counter TSSOP 16-Pin
74HC193PW-Q100	NXP	获取价格	IC BINARY COUNTER, Counter
74HC193PW-Q100	NEXPERIA	获取价格	Presettable synchronous 4-bit binary up/down counter
74HC193PW-Q100J	NXP	获取价格	74HC(T)193-Q100 - Presettable synchronous 4-bit binary up/down counter TSSOP 16-Pin
74HC193-Q100	NEXPERIA	获取价格	Presettable synchronous 4-bit binary up/down counter
74HC194	NXP	获取价格	4-bit bidirectional universal shift register
74HC194D	NXP	获取价格	4-bit bidirectional universal shift register

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