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74FST3400DTR2 PDF预览

74FST3400DTR2

更新时间: 2024-11-05 22:49:51
品牌 Logo 应用领域
安森美 - ONSEMI 总线驱动器总线收发器开关逻辑集成电路光电二极管
页数 文件大小 规格书
8页 99K
描述
4-Bit, 4-Port Bus Exchange Switch

74FST3400DTR2 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:LEAD FREE, TSSOP-24
针数:24Reach Compliance Code:unknown
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.45Is Samacsys:N
系列:CBT/FST/QS/5C/BJESD-30 代码:R-PDSO-G24
JESD-609代码:e4长度:7.8 mm
逻辑集成电路类型:BUS EXCHANGER湿度敏感等级:1
位数:4功能数量:1
端口数量:4端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP24,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH电源:5 V
传播延迟(tpd):6 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Other Logic ICs
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4 V
标称供电电压 (Vsup):4.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:4.4 mmBase Number Matches:1

74FST3400DTR2 数据手册

 浏览型号74FST3400DTR2的Datasheet PDF文件第2页浏览型号74FST3400DTR2的Datasheet PDF文件第3页浏览型号74FST3400DTR2的Datasheet PDF文件第4页浏览型号74FST3400DTR2的Datasheet PDF文件第5页浏览型号74FST3400DTR2的Datasheet PDF文件第6页浏览型号74FST3400DTR2的Datasheet PDF文件第7页 
74FST3400  
4−Bit, 4−Port Bus Exchange  
Switch  
The ON Semiconductor 74FST3400 is a 4−bit, 4−port bus exchange  
switch. The device is CMOS TTL compatible when operating between  
4.0 and 5.5 Volts. The device exhibits extremely low R and adds  
nearly zero propagation delay. The device adds no noise or ground  
bounce to the system.  
ON  
http://onsemi.com  
MARKING  
DIAGRAMS  
Features  
R t 4 W Typical  
Less Than 0.25 ns−Max Delay Through Switch  
Nearly Zero Standby Current  
ON  
24  
1
24  
FST3400  
AWLYWW  
1
No Circuit Bounce  
SOIC−24  
DW SUFFIX  
CASE 751E  
Control Inputs are TTL/CMOS Compatible  
Pin−For−Pin Compatible With QS3400, FST3400, CBT3400  
All Popular Packages: SOIC−24, TSSOP−24, QSOP−24  
All Devices in Package TSSOP are Inherently Pb−Free*  
24  
24  
FST  
3400  
ALYW  
BE  
V
1
2
3
4
5
6
7
8
9
24  
23  
CC  
1
C
D
B
0
3
A
0
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
TSSOP−24  
DT SUFFIX  
CASE 948H  
1
3
3
B
0
A
D
C
D
B
0
3
2
C
1
A
1
2
2
B
1
A
24  
1
24  
D
C
NC  
BX  
1
2
FST3400  
AWLYYWW  
BX  
10  
11  
12  
0
1
BX  
1
3
QSOP−24  
QS SUFFIX  
CASE 492B  
GND  
BX  
2
Figure 1. 24−Lead Pinout  
A
= Assembly Location  
L, WL = Wafer Lot  
Y, YY = Year  
TRUTH TABLE  
W, WW = Work Week  
Function  
Disconnect  
Connect  
BE  
H
BX  
BX  
BX  
BX  
3
A0−3 B0−3  
Hi−Z Hi−Z  
0
1
2
X
X
X
X
PIN NAMES  
L
BXi = L  
BXi = H  
C0−3 D0−3  
D0−3 C0−3  
Pin  
BE  
Description  
Bus Enable Input (Active LOW)  
Bus A, Bus B, Bus C, Bus D  
Bus Exchange (Bit 0)  
Bus Exchange (Bit 1)  
Bus Exchange (Bit 2)  
Bus Exchange (Bit 3)  
No Connect  
Exchange  
L
NOTE: H = HIGH Voltage Level, L = LOW Voltage Level, X = Don’t Care,  
NOTE: Hi−Z = High Impedance, i = 0, 1, 2 or 3  
Ax, Bx, Cx, Dx  
OE , OE  
1
2
2
2
2
2
2
2
OE , OE  
1
OE , OE  
1
OE , OE  
1
OE , OE  
1
OE , OE  
Ground  
1
OE , OE  
Power  
1
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
January, 2005 − Rev. 5  
74FST3400/D  

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