CD74FCT240AT and CD74FCT244AT were not acquired from Harris Semiconductor.
CD54/74FCT240, CD54/74FCT240AT,
CD54/74FCT241, CD54/74FCT244,
Data sheet acquired from Harris Semiconductor
SCHS270A
CD54/74FCT244AT
FCT Interface Logic
Octal Buffers/Line Drivers, Three-State
February 1996
Features
Description
• CD54/74FCT240, CD54/74FCT240AT - Inverting
The CD54/74FCT240, 240AT, 241, 244 and 244AT three-
state octal buffers/line drivers use
a small-geometry
• CD54/74FCT241, CD54/74FCT244, CD54/74FCT244AT -
Non-Inverting
BiCMOS technology. The output stage is a combination of
bipolar and CMOS transistors that limits the output-HIGH
level to two diode drops below VCC. This resultant lowering
of output swing (0V to 3.7V) reduces power bus ringing (a
source of EMI) and minimizes VCC bounce and ground
bounce and their effects during simultaneous output
switching. The output configuration also enhances switching
speed and is capable of sinking 48mA to 64mA.
• Buffered Inputs
• Typical Propagation Delay:
o
4.1ns at VCC = 5V, TA = 25 C (FCT240AT, FCT244AT)
• SCR-Latchup-Resistant BiCMOS Process and Circuit
Design
The CD54/74FCT240, 240AT, 244 and 244AT have active-
LOW output enables (1OE, 2OE). The CD54/74FCT241 and
CD54/74FCT241AT have one active-LOW (1OE) and one
active-HIGH (2OE) output enable.
• FCTXXX Types - Speed of Bipolar FAST®/AS/S;
FCTXXXAT Types - 30% Faster Than FAST/AS/S with
Significantly Reduced Power Consumption
• 48mA to 64mA Output Sink Current (Commer-
cial/Extended Industrial)
Functional Diagram
241, 244 240
• Output Voltage Swing Limited to 3.7V at VCC = 5V
• Controlled Output-Edge Rates
2
4
18
16
14
12
9
1A0
1A1
1A2
1A3
2A0
2A1
2A2
2A3
1Y0
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2
2Y3
1Y0
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2
2Y3
6
8
• Input/Output Isolation to VCC
11
13
15
17
• BiCMOS Technology with Low Quiescent Power
7
5
3
240, 244 241
Ordering Information
1
19
VCC = 20
GND = 10
1OE
1OE
o
PART NUMBER
CD54/74FCT240E
CD54/74FCT240ATE
CD54/74FCT241E
CD54/74FCT244E
CD54/74FCT244ATE
CD54/74FCT240M
CD54/74FCT240ATM
CD54/74FCT241M
CD54/74FCT244M
CD54/74FCT244ATM
CD54/74FCT240SM
CD54/74FCT241SM
CD54/74FCT244SM
CD54FCT240H
TEMP. RANGE ( C)
-55 to 125, 0 to 70
-55 to 125, 0 to 70
-55 to 125, 0 to 70
-55 to 125, 0 to 70
-55 to 125, 0 to 70
-55 to 125, 0 to 70
-55 to 125, 0 to 70
-55 to 125, 0 to 70
-55 to 125, 0 to 70
-55 to 125, 0 to 70
-55 to 125, 0 to 70
-55 to 125, 0 to 70
-55 to 125, 0 to 70
-55 to 125
PACKAGE
20 Ld PDIP
20 Ld PDIP
20 Ld PDIP
20 Ld PDIP
20 Ld PDIP
20 Ld SOIC
20 Ld SOIC
20 Ld SOIC
20 Ld SOIC
20 Ld SOIC
20 Ld SSOP
20 Ld SSOP
20 Ld SSOP
2OE
2OE
CD54/74FCT240, CD54/74FCT240AT TRUTH TABLE
INPUT
INPUT
OUTPUT
1OE, 20E
A
L
Y
H
L
L
L
H
X
H
Z
CD54/74FCT244, CD54/74FCT244AT TRUTH TABLE
INPUT
INPUT
OUTPUT
1OE, 2OE
A
L
Y
H
L
L
L
H
X
H
Z
CD54/74FCT241 TRUTH TABLE
INPUT
OUTPUT
INPUT
OUTPUT
1OE
1A
L
1Y
L
2OE
L
2A
X
2Y
Z
CD54FCT241H
-55 to 125
L
L
H
H
Z
H
L
L
CD54FCT244H
-55 to 125
H
X
H
H
H
NOTE: H = High Voltage Level, L = LOW Voltage Level
X = Immaterial, Z = HIGH Impedance
FAST® is a registered trademark of Fairchild Semiconductor Corporation.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
File Number 2227.3
Copyright © Harris Corporation 1996
1