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74FCT162827ATPACT PDF预览

74FCT162827ATPACT

更新时间: 2024-10-01 13:04:55
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 65K
描述
20-Bit Buffers/Drivers with 3-State Outputs 56-TSSOP -40 to 85

74FCT162827ATPACT 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP-56针数:56
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:0.91Is Samacsys:N
控制类型:ENABLE LOW计数方向:UNIDIRECTIONAL
系列:FCTJESD-30 代码:R-PDSO-G56
JESD-609代码:e4长度:14 mm
负载电容(CL):300 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A湿度敏感等级:1
位数:10功能数量:2
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE WITH SERIES RESISTOR输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP56,.3,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TR
峰值回流温度(摄氏度):260电源:5 V
最大电源电流(ICC):0.2 mAProp。Delay @ Nom-Sup:5 ns
传播延迟(tpd):15 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
宽度:6.1 mmBase Number Matches:1

74FCT162827ATPACT 数据手册

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1CY74FCT162827T  
Data sheet acquired from Cypress Semiconductor Corporation.  
Data sheet modified to remove devices not offered.  
CY74FCT16827T  
CY74FCT162827T  
SCCS064 - August 1994 - Revised March 2000  
20-Bit Buffers/Line Drivers  
CY74FCT162827T Features:  
Features  
• Balanced 24 mA output drivers  
• Reduced system switching noise  
• Typical VOLP (ground bounce) <0.6V at VCC = 5V,  
TA= 25˚C  
• FCT-E speed at 3.2 ns  
• Power-off disable outputs permits live insertion  
• Edge-rate control circuitry for significantly improved  
noise characteristics  
Functional Description  
• Typical output skew < 250 ps  
• ESD > 2000V  
• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)  
packages  
• Industrial temperature range of 40˚C to +85˚C  
• VCC = 5V ± 10%  
The CY74FCT16827T 20-bit buffer/line driver and the  
CY74FCT162827T  
20-bit  
buffer/line  
driver  
provide  
high-performance bus interface buffering for wide data/address  
paths or buses carrying parity. These parts can be used as a single  
20-bit buffer or two 10-bit buffers. Each 10-bit buffer has a pair of  
NANDed OE for increased flexibility. The outputs are designed with  
a power-off disable feature to allow for live insertion of boards.  
CY74FCT16827T Features:  
• 64 mA sink current, 32 mA source current  
• Typical VOLP (ground bounce) <1.0V at VCC = 5V,  
TA = 25˚C  
The CY74FCT16827T is ideally suited for driving  
high-capacitance loads and low-impedance backplanes.  
The CY74FCT162827T has 24-mA balanced output drivers  
with current-limiting resistors in the outputs. This reduces the  
need for external terminating resistors and provides for  
minimal undershoot and reduced ground bounce. The  
CY74FCT162827T is ideal for driving transmission lines.  
Logic Block Diagrams  
Pin Configuration  
SSOP/TSSOP  
Top View  
OE  
1
1
OE  
56  
1
2
3
4
OE  
2
1
1
1
1
1
OE  
1
2
Y
A
A
1
1
1
55  
54  
53  
52  
1
2
Y
2
GND  
Y
GND  
A
1
3
5
1
1
3
4
Y
4
A
1
6
51  
50  
49  
48  
Y
A
1
1
1
1
V
CC  
V
CC  
7
Y
1
1
1
5
A
A
1
1
5
6
8
Y
6
9
Y
7
A
10  
11  
1
7
47  
46  
GND  
GND  
FCT16827-1  
TO 9 OTHER CHANNELS  
Y
8
1
A
A
1
1
8
9
45  
44  
43  
42  
41  
12  
13  
Y
9
1
A
Y
10  
14  
15  
16  
17  
18  
1
10  
1
Y
A
A
A
2
2
2
1
OE  
2
2
2
1
2
3
2
1
Y
2
OE  
2
2
Y
3
40  
39  
38  
37  
36  
35  
34  
GND  
Y
GND  
A
19  
20  
21  
22  
23  
2
2
2
4
2
2
2
4
5
6
Y
5
A
A
A
Y
Y
6
2
1
2
1
V
CC  
V
CC  
Y
7
A
7
2
2
2
2
Y
8
A
8
24  
25  
33  
32  
31  
GND  
Y
GND  
A
FCT16827-2  
26  
27  
28  
2
2
9
TO 9 OTHER CHANNELS  
2
2
2
9
Y
10  
A
10  
30  
29  
OE  
1
OE  
2
2
FCT16827-3  
Copyright © 2000, Texas Instruments Incorporated  

74FCT162827ATPACT 替代型号

型号 品牌 替代类型 描述 数据表
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