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74F841SPCQR PDF预览

74F841SPCQR

更新时间: 2024-11-08 13:04:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 锁存器
页数 文件大小 规格书
6页 51K
描述
Bus Driver, F/FAST Series, 1-Func, 10-Bit, True Output, TTL, PDIP24, 0.300 INCH, SLIM, PLASTIC, DIP-24

74F841SPCQR 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:DIP包装说明:0.300 INCH, SLIM, PLASTIC, DIP-24
针数:24Reach Compliance Code:unknown
风险等级:5.8Is Samacsys:N
系列:F/FASTJESD-30 代码:R-PDIP-T24
JESD-609代码:e0长度:30.095 mm
逻辑集成电路类型:BUS DRIVER位数:10
功能数量:1端口数量:2
端子数量:24最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP24,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
传播延迟(tpd):8 ns认证状态:Not Qualified
座面最大高度:5.08 mm子类别:FF/Latches
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

74F841SPCQR 数据手册

 浏览型号74F841SPCQR的Datasheet PDF文件第2页浏览型号74F841SPCQR的Datasheet PDF文件第3页浏览型号74F841SPCQR的Datasheet PDF文件第4页浏览型号74F841SPCQR的Datasheet PDF文件第5页浏览型号74F841SPCQR的Datasheet PDF文件第6页 
March 1988  
Revised August 1999  
74F841  
10-Bit Transparent Latch  
General Description  
Features  
3-STATE output  
The 74F841 bus interface latch is designed to eliminate the  
extra packages required to buffer existing latches and pro-  
vide extra data width for wider address/data paths or buses  
carrying parity. The 74F841 is a 10-bit transparent latch, a  
10-bit version of the 74F373.  
Ordering Code:  
Order Number Package Number  
Package Description  
74F841SC  
M24B  
N24C  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide  
74F841SPC  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
© 1999 Fairchild Semiconductor Corporation  
DS009599  
www.fairchildsemi.com  

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