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74F652SPCQR PDF预览

74F652SPCQR

更新时间: 2024-11-12 13:04:55
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
8页 74K
描述
Registered Bus Transceiver, 1-Func, 8-Bit, True Output, TTL, PDIP24,

74F652SPCQR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP24,.3Reach Compliance Code:compliant
风险等级:5.45控制类型:INDEPENDENT CONTROL
计数方向:BIDIRECTIONALJESD-30 代码:R-PDIP-T24
JESD-609代码:e0逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
位数:8功能数量:1
端子数量:24最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP24,.3
封装形状:RECTANGULAR封装形式:IN-LINE
电源:5 V子类别:Bus Driver/Transceivers
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
触发器类型:POSITIVE EDGEBase Number Matches:1

74F652SPCQR 数据手册

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March 1988  
Revised January 2004  
74F652  
Transceivers/Registers  
General Description  
Features  
Independent registers for A and B buses  
Multiplexed real-time and stored data  
74F652 non-inverting data path  
These devices consist of bus transceiver circuits with  
D-type flip-flops, and control circuitry arranged for multi-  
plexed transmission of data directly from the input bus or  
from internal registers. Data on the A or B bus will be  
clocked into the registers as the appropriate clock pin goes  
to HIGH logic level. Output Enable pins (OEAB, OEBA) are  
provided to control the transceiver function.  
Ordering Code:  
Order Number Package Number  
Package Description  
74F652SC  
(Note 1)  
M24B  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
74F652SPC  
N24C  
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Note 1: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
© 2004 Fairchild Semiconductor Corporation  
DS009581  
www.fairchildsemi.com  

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