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74F64QC PDF预览

74F64QC

更新时间: 2024-11-12 12:59:07
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD
页数 文件大小 规格书
4页 52K
描述
AND-OR-Invert Gate, F/FAST Series, 1-Func, 11-Input, TTL, PQCC20, PLASTIC, CC-20

74F64QC 技术参数

生命周期:Obsolete零件包装代码:QFN
包装说明:QCCJ,针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.75Is Samacsys:N
系列:F/FASTJESD-30 代码:S-PQCC-J20
长度:8.9662 mm逻辑集成电路类型:AND-OR-INVERT GATE
功能数量:1输入次数:11
端子数量:20最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装形状:SQUARE
封装形式:CHIP CARRIER传播延迟(tpd):5.5 ns
认证状态:Not Qualified座面最大高度:4.57 mm
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD宽度:8.9662 mm
Base Number Matches:1

74F64QC 数据手册

 浏览型号74F64QC的Datasheet PDF文件第2页浏览型号74F64QC的Datasheet PDF文件第3页浏览型号74F64QC的Datasheet PDF文件第4页 
April 1988  
Revised March 1999  
74F64  
4-2-3-2-Input AND-OR-Invert Gate  
General Description  
This device contains gates configured to perform a 4-2-3-2  
input AND-OR-INVERT function.  
Ordering Code:  
Order Number Package Number  
Package Description  
74F64SC  
74F64SJ  
74F64PC  
M14A  
M14D  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Unit Loading/Fan Out  
Input IIH/IIL  
U.L.  
Pin Names  
Description  
Inputs  
Output IOH/IOL  
HIGH/LOW  
1.0/1.0  
An, Bn, Cn, Dn  
O
20 µA/0.6 mA  
1 mA/20 mA  
Output  
50/33.3  
© 1999 Fairchild Semiconductor Corporation  
DS009467.prf  
www.fairchildsemi.com  

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