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74F623PC PDF预览

74F623PC

更新时间: 2024-11-17 22:37:03
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线收发器逻辑集成电路光电二极管驱动
页数 文件大小 规格书
6页 56K
描述
Inverting Octal Bus Transceiver with 3-STATE Outputs

74F623PC 数据手册

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April 1988  
Revised August 1999  
74F620 • 74F623  
Inverting Octal Bus Transceiver with 3-STATE Outputs  
General Description  
Features  
These devices are octal bus transceivers designed for  
asynchronous two-way data flow between the A and B bus-  
ses. Both busses are capable of sinking 64 mA and have 3-  
STATE outputs. Dual enable pins (GAB, GBA) allow data  
transmission from the A bus to the B bus or from the B bus  
to the A bus. The 74F620 is an inverting option of the  
74F623.  
Designed for asynchronous two-way data flow between  
busses  
Outputs sink 64 mA  
Dual enable inputs control direction of data flow  
Guaranteed 4000V minimum ESD protection  
74F620 is an inverting option of the 74F623  
Ordering Code:  
Order Number Package Number  
Package Description  
74F620PC  
74F623SC  
74F623PC  
N20A  
M20B  
N20A  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
FAST is a registered trademark of Fairchild Semiconductor Corporation  
© 1999 Fairchild Semiconductor Corporation  
DS009577  
www.fairchildsemi.com  

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