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74F544MSA PDF预览

74F544MSA

更新时间: 2024-11-06 22:16:23
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
6页 61K
描述
Octal Registered Transceiver

74F544MSA 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SSOP包装说明:5.30 MM, EIAJ TYPE2, SSOP-24
针数:24Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.7
其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION控制类型:INDEPENDENT CONTROL
计数方向:BIDIRECTIONAL系列:F/FAST
JESD-30 代码:R-PDSO-G24JESD-609代码:e0
长度:8.2 mm逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
最大I(ol):0.064 A位数:8
功能数量:1端口数量:2
端子数量:24最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP24,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):130 mAProp。Delay @ Nom-Sup:10.5 ns
传播延迟(tpd):14.5 ns认证状态:Not Qualified
座面最大高度:2.05 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
宽度:5.3 mmBase Number Matches:1

74F544MSA 数据手册

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April 1988  
Revised August 1999  
74F544  
Octal Registered Transceiver  
General Description  
Features  
The 74F544 octal transceiver contains two sets of D-type  
latches for temporary storage of data flowing in either  
direction. Separate Latch Enable and Output Enable inputs  
are provided for each register to permit independent con-  
trol of inputting and outputting in either direction of data  
flow. The A outputs are guaranteed to sink 24 mA while the  
B outputs are rated for 64 mA. The 74F544 inverts data in  
both directions.  
8-bit octal transceiver  
Back-to-back registers for storage  
Separate controls for data flow in each direction  
A outputs sink 24 mA, B outputs sink 64 mA  
Ordering Code:  
Order Number Package Number  
Package Description  
74F544SC  
M24B  
MSA24  
N24C  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide  
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide  
74F544MSA  
74F544SPC  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
© 1999 Fairchild Semiconductor Corporation  
DS009555  
www.fairchildsemi.com  

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