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74F32 PDF预览

74F32

更新时间: 2024-11-25 22:37:03
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD
页数 文件大小 规格书
6页 81K
描述
Quad 2-Input OR Gate

74F32 数据手册

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April 1988  
Revised August 2000  
74F32  
Quad 2-Input OR Gate  
General Description  
This device contains four independent gates, each of which  
performs the logic OR function.  
Ordering Code:  
Order Number Package Number  
Package Description  
74F32SC  
74F32SJ  
74F32MTC  
74F32PC  
M14A  
M14D  
MTC14  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Unit Loading/Fan Out  
Input IIH/IIL  
U.L.  
Pin Names  
Description  
Output IOH/IOL  
HIGH/LOW  
1.0/1.0  
An, Bn  
On  
Inputs  
Outputs  
20 µA/0.6 mA  
1 mA/20 mA  
50/33.3  
© 2000 Fairchild Semiconductor Corporation  
DS009463  
www.fairchildsemi.com  

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