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74F30PCQR PDF预览

74F30PCQR

更新时间: 2024-11-26 13:00:15
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD
页数 文件大小 规格书
4页 52K
描述
NAND Gate, TTL, PDIP14,

74F30PCQR 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete包装说明:DIP, DIP14,.3
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.92JESD-30 代码:R-PDIP-T14
JESD-609代码:e0逻辑集成电路类型:NAND GATE
湿度敏感等级:2A端子数量:14
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):250
电源:5 V施密特触发器:NO
子类别:Gates标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
Base Number Matches:1

74F30PCQR 数据手册

 浏览型号74F30PCQR的Datasheet PDF文件第2页浏览型号74F30PCQR的Datasheet PDF文件第3页浏览型号74F30PCQR的Datasheet PDF文件第4页 
April 1988  
Revised August 1999  
74F30  
8-Input NAND Gate  
General Description  
This device contains a single gate, which performs the  
logic NAND function.  
Ordering Code:  
Order Number Package Number  
Package Description  
74F30SC  
74F30SJ  
74F30PC  
M14A  
M14D  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Function Table  
Unit Loading/Fan Out  
Inputs  
Output  
Input IIH/IIL  
U.L.  
Pin Names Description  
A0  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
O
H
H
H
H
H
H
H
H
L
Output IOH/IOL  
HIGH/LOW  
1.0/1.0  
L
X
X
X
X
X
X
X
H
X
L
X
X
L
X
X
X
L
X
X
X
X
L
X
X
X
X
X
L
X
X
X
X
X
X
L
X
X
X
X
X
X
X
L
A0–A7  
Inputs  
20 µA/0.6 mA  
1 mA/20 mA  
O
Output  
50/33.3  
X
X
X
X
X
X
H
X
X
X
X
X
H
X
X
X
X
H
X
X
X
H
X
X
H
X
H
H
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
© 1999 Fairchild Semiconductor Corporation  
DS009560  
www.fairchildsemi.com  

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