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74F269SPC PDF预览

74F269SPC

更新时间: 2024-11-24 22:26:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 计数器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
6页 71K
描述
8-Bit Bidirectional Binary Counter

74F269SPC 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:0.300 INCH, PLASTIC, MS-001, DIP-24
针数:24Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.67
Is Samacsys:N其他特性:TCO OUTPUT
计数方向:BIDIRECTIONAL系列:F/FAST
JESD-30 代码:R-PDIP-T24JESD-609代码:e3
长度:31.915 mm负载电容(CL):50 pF
负载/预设输入:YES逻辑集成电路类型:BINARY COUNTER
最大频率@ Nom-Sup:85000000 Hz最大I(ol):0.02 A
工作模式:SYNCHRONOUS位数:8
功能数量:1端子数量:24
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP24,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):135 mA
传播延迟(tpd):11 ns认证状态:Not Qualified
座面最大高度:5.08 mm子类别:Counters
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:7.62 mm最小 fmax:85 MHz
Base Number Matches:1

74F269SPC 数据手册

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April 1988  
Revised September 2000  
74F269  
8-Bit Bidirectional Binary Counter  
General Description  
Features  
Synchronous counting and loading  
The 74F269 is  
a
fully synchronous 8-stage up/down  
counter featuring a preset capability for programmable  
operation, carry lookahead for easy cascading and a U/D  
input to control the direction of counting. All state changes,  
whether in counting or parallel loading, are initiated by the  
rising edge of the clock.  
Built-in lookahead carry capability  
Count frequency 100 MHz  
Supply current 113 mA typ  
300 mil slimline package  
Ordering Code:  
Order Number Package Number  
Package Description  
74F269SC  
M24B  
N24C  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
74F269SPC  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
Function Table  
PE CEP CET U/D CP  
Function  
Parallel Load All  
Flip-Flops  
L
X
X
X
H
H
H
H
H
X
L
X
H
L
X
X
H
L
Hold  
Hold (TC Held HIGH)  
Count Up  
L
L
Count Down  
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Immaterial  
= Transition LOW-to-HIGH  
© 2000 Fairchild Semiconductor Corporation  
DS009510  
www.fairchildsemi.com  

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